56858 Datasheet, PDF (9/64 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Introduction
Part 3 Signals and Package Information
All digital inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are
enabled by default. Exceptions:
1. When a pin has GPIO functionality, the pull-up may be disabled under software control.
2. MODE A, MODE B and MODE C pins have no pull-up.
3. TCK has a weak pull-down circuit always active.
4. Bidirectional I/O pullups automatically disable when the output is enabled.
This table is presented consistently with the Signals Identified by Functional Group figure.
1. BOLD entries in the Type column represents the state of the pin just out of reset.
2. Output(Z) means an output in a High-Z condition.
Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA
Signal
Name
V_DD
V_DD
V_DD
V_DD
V_DD
V_DD
V_DD
V_DD
V_SS
V_SS
V_SS
V_SS
V_SS
V_SS
V_SS
V_SS
BGA LQFP
Pin No. Pin No.
E1
14
M6
36
F12
52
A9
72
M2
87
J12
88
E12
109
A12
125
G1
15
L6
16
D12
53
A7
54
F1
71
M7
89
K12
126
A8
127
Type
V_DD
Description
Logic Power (V_DD)—These pins provide power to the internal
structures of the chip, and should all be attached to V_DD.
V_SS
Logic Power–Ground (V_SS)—These pins provide grounding for the
internal structures of the chip and should all be attached to V_SS.
56858 Technical Data, Rev. 6
Freescale Semiconductor
9