56858 Datasheet, PDF (19/64 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Introduction
Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA
Signal
Name
STD1
BGA LQFP
Pin No. Pin No.
E8
99
Type
Output
Description
ESSI Transmit Data (STD1)—This output pin transmits serial data
from the ESSI Transmitter Shift Register.
GPIOD0
SRD1
E11
Input/Output Port D GPIO (0)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
100
Input
ESSI Receive Data (SRD1)—This input pin receives serial data and
transfers the data to the ESSI Receive Shift Register.
GPIOD1
SCK1
E9
Input/Output Port D GPIO (1)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
101
Input/Output ESSI Serial Clock (SCK1)—This bidirectional pin provides the serial
bit rate clock for the transmit section of the ESSI. The clock signal can
be continuous or gated and can be used by both the transmitter and
receiver in synchronous mode.
GPIOD2
SC10
D10
Input/Output Port D GPIO (2)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
102
Input/Output ESSI Serial Control Pin 0 (SC10)—The function of this pin is
determined by the selection of either synchronous or asynchronous
mode. For asynchronous mode, this pin will be used for the receive
clock I/O. For synchronous mode, this pin is used either for
transmitter1 output or for serial I/O flag 0.
GPIOD3
SC11
D11
Input/Output Port D GPIO (3)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
103
Input/Output ESSI Serial Control Pin 1 (SC11)—The function of this pin is
determined by the selection of either synchronous or asynchronous
mode. For asynchronous mode, this pin is the receiver frame sync I/O.
For synchronous mode, this pin is used either for transmitter2 output
or for serial I/O flag 1.
GPIOD4
SC12
C11
Input/Output Port D GPIO (4)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
104
Input/Output ESSI Serial Control Pin 2 (SC12)—This pin is used for frame sync
I/O. SC02 is the frame sync for both the transmitter and receiver in
synchronous mode and for the transmitter only in asynchronous mode.
When configured as an output, this pin is the internally generated
frame sync signal. When configured as an input, this pin receives an
external frame sync signal for the transmitter (and the receiver in
synchronous operation).
GPIOC5
Input/Output Port D GPIO (5)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
56858 Technical Data, Rev. 6
Freescale Semiconductor
19