33982B Datasheet, PDF (9/34 Pages) Freescale Semiconductor, Inc – Single Intelligent High-Current Self-Protected Silicon High-Side Switch (2.0 mohm)

ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 4.5 V ≤ V_DD ≤ 5.5 V, 6.0 V ≤ V_PWR ≤ 27 V, -40°C ≤ T_A ≤ 125°C unless otherwise
noted. Typical values noted reflect the approximate parameter mean at T_A = 25°C under nominal conditions unless otherwise
noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER OUTPUT (CONTINUED)
Output Negative Clamp Voltage
0.5 A < I_HS < 2.0 A, Output OFF
Overtemperature Shutdown ⁽¹²⁾
Overtemperature Shutdown Hysteresis ⁽¹²⁾
CONTROL INTERFACE
Input Logic High Voltage ⁽¹³⁾
Input Logic Low Voltage ⁽¹³⁾
Input Logic Voltage Hysteresis ⁽¹⁴⁾
Input Logic Pulldown Current (SCLK, IN, SI)
RST Input Voltage Range
SO, FS Tri-State Capacitance ⁽¹⁵⁾
Input Logic Pulldown Resistor (RST) and WAKE
Input Capacitance ⁽¹⁵⁾
WAKE Input Clamp Voltage ⁽¹⁶⁾
I_CL(WAKE) < 2.5 mA
WAKE Input Forward Voltage
I_CL(WAKE) = -2.5 mA
SO High-State Output Voltage
I_OH = 1.0 mA
FS, SO Low-State Output Voltage
I_OL = -1.6 mA
SO Tri-State Leakage Current
CS > 0.7 V_DD
Input Logic Pullup Current ⁽¹⁷⁾
CS, V_IN > 0.7 V_DD
FSI Input Pin External Pulldown Resistance
FSI Disabled, HS Indeterminate
FSI Enabled, HS OFF
FSI Enabled, HS ON
V_CL
V
- 20
–
-15
T_SD
160
175
190
°C
T_SD(HYS)
5.0
–
20
°C
V_IH
V_IL
V_IN(HYS)
I_DWN
V_RST
C_SO
R_DWN
C_IN
V_CL(WAKE)
V_F(WAKE)
V_SOH
V_SOL
I_SO(LEAK)
I_UP
RFS
RFSdis
RFSoff
RFSon
0.7 V_DD
–
100
5.0
4.5
–
100
–
7.0
- 2.0
0.8 V_DD
–
-5.0
5.0
–
6.0
30
–
–
V
–
0.2 V_DD
V
600
1200
mV
–
20
µA
5.0
5.5
V
–
20
pF
200
400
kΩ
4.0
12
pF
V
–
14
V
–
-0.3
V
–
–
V
0.2
0.4
µA
0.0
5.0
µA
–
20
kΩ
0.0
1.0
10
14
–
–
Notes
12. Guaranteed by process monitoring. Not production tested.
13. Upper and lower logic threshold voltage range applies to SI, CS, SCLK, RST, IN, and WAKE input signals. The WAKE and RST signals
may be supplied by a derived voltage reference to V_PWR.
14. No hysteresis on FSI and wake pins. Parameter is guaranteed by process monitoring but is not production tested.
15. Input capacitance of SI, CS, SCLK, RST, and WAKE. This parameter is guaranteed by process monitoring but is not production tested.
16. The current must be limited by a series resistance when using voltages > 7.0 V.
17. Pullup current is with CS OPEN. CS has an active internal pullup to V_DD.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33982
9