56F8345_07 Datasheet, PDF (86/172 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

5.6.5.5 GPIOA Interrupt Priority Level (GPIOA IPL)—Bits 5–4
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.5.6 GPIOB Interrupt Priority Level (GPIOB IPL)—Bits 3–2
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.5.7 GPIOC Interrupt Priority Level (GPIOC IPL)—Bits 1–0
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.6 Interrupt Priority Register 5 (IPR5)
Base + $5
Read
Write
RESET
15 14 13 12 11 10 9
8
7
DEC1_XIRQ DEC1_HIRQ SCI1_RCV SCI1_RERR
0
IPL
IPL
IPL
IPL
6
5
4
0
SCI1_TIDL
IPL
0
0
0
0
0
0
0
0
0
0
0
0
Figure 5-8 Interrupt Priority Register 5 (IPR5)
3
2
SCI1_XMIT
IPL
0
0
1
0
SPI0_XMIT
IPL
0
0
5.6.6.1 Quadrature Decoder 1 INDEX Pulse Interrupt Priority Level
(DEC1_XIRQ IPL)—Bits 15–14
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
56F8345 Technical Data, Rev. 17
86
Freescale Semiconductor
Preliminary