56F8345_07 Datasheet, PDF (81/172 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Register Descriptions
• 10 = IRQ is priority level 2
• 11 = IRQ is priority level 3
5.6.3 Interrupt Priority Register 2 (IPR2)
Base + $2
Read
Write
RESET
15 14 13 12 11 10 9
8
7
6
5
4
3
2
FMCBE IPL FMCC IPL FMERR IPL LOCK IPL
LVI IPL
0
0
IRQB IPL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 5-5 Interrupt Priority Register 2 (IPR2)
1
0
IRQA IPL
0
0
5.6.3.1 Flash Memory Command, Data, Address Buffers Empty Interrupt
Priority Level (FMCBE IPL)—Bits 15–14
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.3.2 Flash Memory Command Complete Priority Level (FMCC IPL)—
Bits 13–12
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.3.3 Flash Memory Error Interrupt Priority Level (FMERR IPL)—Bits 11–10
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
56F8345 Technical Data, Rev. 17
Freescale Semiconductor
81
Preliminary