MC68882FN25A Datasheet, PDF (8/26 Pages) Freescale Semiconductor, Inc – HCMOS Enhanced Floating-Point Coprocessor

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Freescale Semiconductor, Inc.
Table 1. Exponent and Mantissa Sizes
Data
Format
Single
Double
Extended
Exponent
Bits
8
11
15
Mantissa
Bits
23(tl)
52(+1)
64
Bias
127
1023
16383
expandability and for long-word alignment of floating-
point data structures. Extended format hasa 15-bit ex-
ponent, a 64-bit mantissa, and a l-bit mantissa sign.
Extended precision numbers are intended for use as
temporary variables, intermediate values, or in areas
where extra precision is needed, For example, a compiler
might select extended precision arithmetic for evaluation
of the right side of an equation with mixed sized data
and then convert the answer to the data type on the left
side of the equation. It is anticipated that extended pre-
cision data will not be stored in large arrays due to the
amount of memory required by each value.
registers always contain extended precision values. All
operands used are converted to extended precision by
the MC68882 before a specific operation is performed,
and all results are in extended precision. The use of ex-
tended precision ensures maximum accuracy without
sacrificing performance. Refer to Figure 9 for a summary
of the memory formats for the seven data formats sup-
ported by the MC68882.
f.!.’..}.~.~~{$,*?~,*:..*,(*,.!~tt.,
~,,\.;$,.\~.,/.y~.,.‘.”..:~~, $j,.,,
.,.
1$.,1
P4;3
The MC68882 instruction set ist&~~$~8&d intO SiX major
classes:
‘<\k:v:\:,p:i
1. Moves between the,~~&8882 and memory or the
MC68020 or MC$@~@A and out),
2. Move multipl~t~[~i$~ers (in and out),
3, Monadic og~~~@*s,
PACKED DECIMAL STRING REAL DATA FORMAT
The packed decimal data format allows packed BCD
strings’to be transferred to and from the MC68882. The
strings consist of a 3-digit base 10 exponent and a 17- ^{,:~~~Qn$ll moves from memory (or from an MC68020 or}
digit base 10 mantissa. Both the exponent and mantissa., ^{$~.:t~’~g68030 data register) to the MC68882, data is converted}
have a separate sign bit. All digits are packed BCD; an~i$t:V; ^{:@~4~rom the source data format to the internal extended pre-}
entire string fits in 96 bits (three long words). As is th~.
cision format. On all moves from the MC68882 to memory
case with all data formats when packed BCD str~,~$ are
(or, to an MC68020, or .MC68030 data register), data is
supplied to the MC68882, the strings are auto~atrwally
converted from the internal extended precision format to
converted to extended precision real valuP@~$$,*$ con-
the destination data format. Note that data movement
version allows packed BCD numbers
to any operation. For example:
to b.~.e,.{i~$:;~!.~!+~:a~:i~:?,>,f~\,%~
.:;:’“:1...~, .i*.
inputs
instructions perform arithmetic operations, since the re-
suit is always rounded to the precision selected in the
FPCR mode control byte. The result is rounded using the
FADD.P #-6.023E + ~~$w
selected rounding mode and is checked for overflow and
BCD numbers can be output$~~.~,%~e MC68882 in a
underflow.
format readily used for printingb~~program
generated
The syntax for the move is:
by a high-level language c,~w~h~! For example:
FMOVE.<fmt> <ea>,FPn .Move to MC68882
FM OVE,P ,@&~$.Q@FFER{# – 5}
FMOVE.<fmt> FPm,<ea> Move from MC68882
This instruction con$~t@ the floating-point data reg-
ister 3 (FP3) cont~~{~. intd a packed BCD string with five
digits to the ri~g?H,,,t~.&,{,.>~?$t~#.,~~&i: decimal point (FORTRAN F for-
mat).
?$.;,,.~,..$~\.k,.’,,\,t,$\ ^s,,}
FMOVE.X
FPm,FPn
Move within MC68882
where:
<ea> is an MC68020 or MC68030 effective address
operand.
,<fmt> is the data format size.
~;~...:,~.,,,
$$?~~~t~’formats described above are supported or-
thB~Q”flBlly by all arithmetic and transcendental opera-
FPm and FPn are floating-point data registers.
MOVE MULTIPLE REGISTERS
$~~&*and by all appropriate MC68020 or MC68030
~dressing modes. For example, all of the following are
legal instructions:
FADD.B
#O,FPO
FADD.W
D2,FP3
FADD.L
BIGINT,FP7
The floating-point move mul~iple instructions on the
MC68882 are much like the integer counterparts on’the
M68000 Family processors. Any set of the floating-point
registers FPOthrough FP7 can be moved to or from mem-
ory with one instruction. These registers are always moved
as 96-bit extended data with no conversion (hence no
FADD.S
#3.14159,FP5
possibility of conversion errors). Some examples of the
FADD.D
(SP) + ,FP6
move multiple instruction are as follows:
FADD.X
[(TEMP-PTR,A7)], FP3
FMOVEM
(ea>,FPO-FP3/FP7
FADD.P
#1.23 E25,FP0
Most on-chip calculations are performed in the ex-
FMOVEM
FP21FP41FP6,<ea>
The move multiple instructions are useful during con-
Q;
tended precision format, and the eight floating-point data
text switches and interrupts to save or restore the state
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