MC68882FN25A Datasheet, PDF (7/26 Pages) Freescale Semiconductor, Inc – HCMOS Enhanced Floating-Point Coprocessor

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Freescale Semiconductor, Inc.
Since the coprocessor interface is based solely upon
potentially fully concurrent and, therefore, can be com-
bus cycles (to and from CPU space) and the MC68882 is
pletely executed during the execution of a previous in-
never a bus master, the MC68882 can be placed on either
struction.
the logical or physical side of the system memory man-
The MC68882 also has a more optimized coprocessor
agement unit in an MC68020-based system. Since the
interface than the MC68881. If an arithmetic instruction
memory management unit of the MC68030 is on-chi~,
has data formats of Single, Double or Extended, the dial-
the MC68882 is-always on the physical side of the mern~
ogs are designed to increase the potential overlap with
ory management unit in an MC68030 system.
subsequent instructions, This overlap can significantly
The virtual machine architecture of the MC68020 or
decrease the effective instruction execution time.
MC68030 is supported by the coprocessor intetiace and
the MC68882 through the FSAVE and FRESTORE instruc-
tions. If the MC68020 or MC68030 detects a page fault
and/or a task time out, the MC68020 or MC68030 can force
the MC68882 to stop whatever operation is in progress
at any time and save the MC68882 internal state in mem-
ory, During the execution of a floating-point instruction,
the MC68882 can stop at predetermined points as well
as at the completion of the instruction.
The size of the saved internal state of the MC68882 is
dependent upon the state of the APU at the time the
FSAVE is executed, If the MC68882 is in the reset state
when the FSAVE instruction is received, only one word
of state is transferred to memory, which may be exam-
ined by the operating system to determine that the co-
processor programmer’s
model is empty, If the
coprocessor is in the idle state when the save instruction
is received, only a few words of internal state are trans-
ferred to memory. If executing an instruction in the busy
Double Precision Rga~~~~N’
Extended Precisi~~,~<$PIX)
Packed Decimal”t~$@~’Real (P)
The capital letter<~$$~%ined in parentheses denote suf-
fixes added .~d}$~:troctions in the assembly language
source spW~l@~~fhe data format to be used.
,$ $*“*,,, ^.~y.
lNTE~~:~A$A
FORMATS
~~e t~be integer data formats (byte, word, and long
state, it may be necessary to save the entire internal state
,,,~~oral. are the standard twos complement data formats
of the machine, Instructions completing execution in less ^{, $,sd$ported in the M68000 Family architecture. Whenever}
time than it takes to save the larger state in mid-instrucl~c?~~~c“,&~ integer is used in a floating-point operation, the in-
tion are allowed to complete execution and then save the “’‘”I+i‘,“’’’’’’’tiger is automatically converted by the MC68882 to an
idle state, Thus, the size of the saved internal state is kepl
to a minimum. The ability to utilize several inter~~y, state
extended precision floating-point number before being
used. For example, to add an integer constant of five to
sizes greatly reduces the average conte”xt switch~~g~tie.
the number contained in ‘floating-point data “register 3
The FRESTORE instruction permits reloa~i’k~~k%n in-
(FP3), the following instruction can be used:
ternal state that was saved earlier and co~~~q.~ any op-
eration that was previously suspende~. ~~,~&~STORE of
the null state frame re-establishes d~~b$~@pister values,
a function identical to the MC68,w\L~:,..:_,:~.,:~*$r\_~*d~. w\>are
reset,
MC68882 PERFORMANCE ~~~:\.@, @EMENTS
The high performanceKo$:~h$iMC68882 is the result of
the MC68882’S abilty $* ~~cute multiple floating-point
FADD.W #5,FP3
(The Motorola assembler syntax “#” is used to
denote immediate addressing.)
The ability to effectively use integers in floating-point
operations saves user memory since an integer repre-
sentation ofa number, if representable, is usually smaller
than the equivalent floating-point representation.
instructions concu,$$ent?~gF~he direct result of concur-
rency is to utilize$~~~~rithmetic Processing Unit (APU)
more efficient~,{b~~’@&creasing its idle time.
When th~;~,t*82
receives an instruction, the BIU,
along wit~~@~~@U, can initiate the instruction, fetch the
necesWW ~erands, and convert them to the internal
extq,~$~~,.,$rmat even though the APU is busy complet-
ins~s%s~ution of a previous instruction. Although the
t&&~81 can only instruct the main processor to wait if
~&’’~PU is busy, the MC68882 CU can proceed with the
n~xt instruction. When the APU is finally ready to perform
the
calc(~lation. _{., -}it_---c_-a_-n_-- dn
s_--n
imm~diatelv
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without incur-
ring delav due to data movement and preparation func-
tio;s.
‘
Another factor in obtaining increased performance in
the MC68882 is the oDtimized FMOVE instructions for
binary real data formats. These FMOVE instructions ex-
FLOATING-POINT DATA FORMATS
The floating-point data formats, single precision (32-
bits) and double precision (64-bits), are defined by the
IEEE standard. These data formats are the main floating-
point formats and should be used for most calculations
involving real numbers, Table 1 lists the exponent and
mantissa size for single, double, and extended precision,
The exponent is biased, and the mantissa is in sign and
magnitude form. Since single and double precision re-
quire normalized numbers, the most-significant bit of the
mantissa is implied as a one and is ndt included, thus
giving one extra bit of precision,
The extended precision data format is also in conform-
ante with the IEEE standard, but the standard does not
specify this format to the bit level whereas it does for
single and double precision. The memory format on the
ecute twice as fast as the corresponding FMOVE instruc-
MC68882 consists of 96 bits (three long words), Only 80
tions of the MC68881, The FMOVE instructions are also
bits are actually used; the other 16 bits are for future
MC=
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For More Information On This Product,
Go to: www.freescale.com
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