33975 Datasheet, PDF (8/32 Pages) Freescale Semiconductor, Inc – Multiple Switch Detection Interface with Suppressed Wake-Up and 32mA Wetting Current

STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions of 3.0 V ≤ V_DD ≤ 5.5 V, 8.0 V ≤ V_PWR ≤ 28V, -40°C ≤ T_C ≤ 125°C unless otherwise
noted. Where applicable, typical values reflect the parameter’s approximate average value with V_PWR = 13 V, T_A = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
DIGITAL INTERFACE
Input Logic High-Voltage Thresholds ⁽¹⁰⁾
Input Logic Low-Voltage Thresholds ⁽¹⁰⁾
SCLK, SI, Tri-State SO Input Current
0.0 V to V_DD
CS Input Current
CS = V_DD
CS Pull-Up Current
CS = 0.0 V
SO High-State Output Voltage
I_SO(high) = -200 µA
SO Low-State Output Voltage
I_SO(high) = 1.6 mA
Input Capacitance on SCLK, SI, Tri-State SO ⁽¹¹⁾
INT Internal Pull-Up Current
INT Voltage
INT = Open Circuit
INT Voltage
I_INT = 1.0 mA
WAKE Internal Pull-Up Current
WAKE Voltage
WAKE = Open Circuit
WAKE Voltage
I_WAKE = 1.0 mA
WAKE Voltage ⁽¹¹⁾
Maximum Voltage Applied to WAKE Through External Pull-Up
V_IH
0.7 x V_DD
–
V_DD + 0.3
V
V_IL
GND - 0.3
–
0.2 x V_DD
V
I_SCLK, I_SI,
µA
I_SO(Tri)
-10
–
10
I_CS
µA
-10
–
10
I_CS
30
–
V_SO(high)
V_DD - 0.8
–
V_SO(low)
–
–
µA
100
V
VDD
V
0.4
C_IN
–
–
–
15
40
V _{INT (high)}
VDD - 0.5
–
V _{INT (low)}
–
0.2
20
pF
100
µA
V
VDD
V
0.4
I _{WAKE (pu)}
20
40
100
µA
V _{WAKE (high)}
V
4.0
4.3
5.3
V _WAKE(low)
–
V
0.2
0.4
V _WAKE(max)
–
V
–
40
Notes
10. Upper and lower logic threshold voltage levels apply to SI, CS, and SCLK.
11. This parameter is guaranteed by design however, is not production tested.
33975
8
Analog Integrated Circuit Device Data
Freescale Semiconductor