33975 Datasheet, PDF (13/32 Pages) Freescale Semiconductor, Inc – Multiple Switch Detection Interface with Suppressed Wake-Up and 32mA Wetting Current

FUNCTIONAL DESCRIPTIONS
FUNCTIONAL TERMINAL DESCRIPTION
MCU INTERFACE DESCRIPTION
The 33975 device directly interfaces to a 3.3 V or 5.0 V
microcontroller unit (MCU). SPI serial clock frequencies up to
6.0 MHz may be used for programming and reading switch
input status (production tested at 4.16 MHz). Figure 7
illustrates the configuration between an MCU and one 33975.
Serial peripheral interface (SPI) data is sent to the 33975
device through the SI input terminal. As data is being clocked
into the SI terminal, status information is being clocked out of
the device by the SO output terminal. The response to a SPI
command will always return the switch status, reset flag, and
thermal flag. Input switch states are latched into the SO
register on the falling edge of the chip select (CS) terminal.
Twenty-four bits are required to complete a transfer of
information between the 33975 and the MCU.
MC68HCXX
Microcontroller
Shift Register
MOSI
MISO
SCLK
Parallel
Ports
INT
33975
SI
SO
SCLK
CS
INT
33975
SI
SO
MC68HCXX
Microcontroller
Shift Register
MOSI
MISO
33975
SI
24-Bit Shift Register
SO
SCLK
CS
INT
SCLK
Figure 8. SPI Parallel Interface with Microprocessor
Receive
Buffer
Parallel
Ports
INT
To Logic
CS
INT
Figure 7. SPI Interface with Microprocessor
Two or more 33975 devices may be used in a module
system. Multiple ICs may be SPI-configured in parallel or
serial. Figures 8 and 9 show the configurations. When using
the serial configuration, 48-clock cycles are required to
transfer data in/out of the ICs.
MC68HCXX
Microcontroller
Shift Register
MOSI
MISO
SCLK
Parallel
Ports
INT
33975
SI
SO
SCLK
CS
INT
33975
SI
SO
SCLK
CS
INT
Figure 9. SPI Serial Interface with Microprocessor
Analog Integrated Circuit Device Data
Freescale Semiconductor
33975
13