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33975 Datasheet, PDF (4/32 Pages) Freescale Semiconductor, Inc – Multiple Switch Detection Interface with Suppressed Wake-Up and 32mA Wetting Current
TERMINAL CONNECTIONS
TERMINAL CONNECTIONS
GND
1
SI
2
SCLK
3
CS
4
SP0
5
SP1
6
SP2
7
SP3
8
SG0
9
SG1
10
SG2
11
SG3
12
SG4
13
SG5
14
SG6
15
VPWR
16
32
SO
31
VDD
30
AMUX
29
INT
28
SP7
27
SP6
26
SP5
25
SP4
24
SG7
23
SG8
22
SG9
21
SG10
20
SG11
19
SG12
18
SG13
17
WAKE
Figure 3. 33975 Terminal Connections
Table 2. Terminal Definitions
A functional description of each terminal can be found in the Functional Terminal Description section on page 11.
Terminal
Terminal
Name
Formal Name
Description
1
GND
2
SI
3
SCLK
4
CS
Ground
SPI Slave In
Serial Clock
Chip Select
Ground for logic, analog, and switch-to-battery inputs.
SPI control data input terminal from MCU to 33975.
SPI control clock input terminal.
SPI control chip select input terminal from MCU to 33975. Logic [0] allows data
to be transferred in.
5–8
25 – 28
9 – 15,
18 – 24
16
SPn
SGn
VPWR
Programmable Switches 0–3 Programmable switch-to-battery or switch-to-ground input terminals.
Programmable Switches 4–7
Switch-to-Ground Inputs 0–6 Switch-to-ground input terminals.
Switch-to-Ground Inputs 13–7
Battery Input
Battery supply input terminal. This terminal requires external reverse battery
protection.
17
WAKE
Wake-Up
Open drain wake-up output is designed to control a power supply enable
terminal.
29
INT
Interrupt
Open-drain output to MCU is used to indicate input switch change of state.
30
AMUX
Analog Multiplex Output
Analog multiplex output.
31
VDD
Voltage Drain Supply
3.3/5.0 V supply sets SPI communication level for SO driver.
32
SO
SPI Slave Out
Provides digital data from 33975 to MCU.
33975
4
Analog Integrated Circuit Device Data
Freescale Semiconductor