K60P120M100SF2 Datasheet, PDF (58/69 Pages) Freescale Semiconductor, Inc – K60 Data Sheet

Peripheral operating requirements and behaviors
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
DS10
DS15
DS13
First data
DS14
First data
DS12
Data
Data
DS9
DS11
Last data
DS16
Last data
Figure 24. DSPI classic SPI timing — slave mode
6.8.8 I²C switching specifications
See General switching specifications.
6.8.9 UART switching specifications
See General switching specifications.
6.8.10 SDHC specifications
The following timing specs are defined at the chip I/O pin and must be translated
appropriately to arrive at timing specs/constraints for the physical interface.
Table 46. SDHC switching specifications
Num
SD1
SD2
SD3
SD4
SD5
Symbol
fpp
fpp
fpp
f_OD
t_WL
t_WH
t_TLH
t_THL
Description
Min.
Max.
Card input clock
Clock frequency (low speed)
0
400
Clock frequency (SD\SDIO full speed)
0
25
Clock frequency (MMC full speed)
0
20
Clock frequency (identification mode)
0
400
Clock low time
7
—
Clock high time
7
—
Clock rise time
Refer Table 3
Clock fall time
SDHC output / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
Table continues on the next page...
Unit
kHz
MHz
MHz
kHz
ns
ns
ns
ns
K60 Data Sheet Data Sheet, Rev. 6.1, 08/2012.
58
Freescale Semiconductor, Inc.