K60P120M100SF2 Datasheet, PDF (44/69 Pages) Freescale Semiconductor, Inc – K60 Data Sheet

Peripheral operating requirements and behaviors
Table 30. 16-bit ADC with PGA characteristics (continued)
Symbol Description
G
Gain⁴
Conditions
• PGAG=0
• PGAG=1
• PGAG=2
• PGAG=3
• PGAG=4
• PGAG=5
• PGAG=6
Min.
Typ.¹
Max.
Unit
0.95
1
1.05
1.9
2
2.1
3.8
4
4.2
7.6
8
8.4
15.2
16
16.6
30.0
31.6
33.2
58.8
63.3
67.8
BW
PSRR
Input signal
bandwidth
Power supply
rejection ratio
• 16-bit modes
• < 16-bit modes
Gain=1
—
—
4
kHz
—
—
40
kHz
—
-84
—
dB
CMRR Common mode
rejection ratio
• Gain=1
• Gain=64
V_OFS
T_GSW
E_IL
Input offset
voltage
Gain switching
settling time
Input leakage
error
All modes
—
-84
—
dB
—
-85
—
dB
—
0.2
—
mV
—
—
10
µs
I_In × R_AS
mV
V_PP,DIFF
Maximum
differential input
signal swing
SNR
Signal-to-noise
ratio
THD
Total harmonic
distortion
• Gain=1
• Gain=64
• Gain=1
• Gain=64
SFDR Spurious free
dynamic range
• Gain=1
• Gain=64
V
where V_X = V_REFPGA × 0.583
80
90
—
dB
52
66
—
dB
85
100
—
dB
49
95
—
dB
85
105
—
dB
53
88
—
dB
Table continues on the next page...
Notes
R_AS < 100Ω
V_DDA= 3V
±100mV,
f_VDDA= 50Hz,
60Hz
V_CM=
500mVpp,
f_VCM= 50Hz,
100Hz
Output offset =
V_OFS*(Gain+1)
5
I_In = leakage
current
(refer to the
MCU's voltage
and current
operating
ratings)
6
16-bit
differential
mode,
Average=32
16-bit
differential
mode,
Average=32,
f_in=100Hz
16-bit
differential
mode,
Average=32,
f_in=100Hz
K60 Data Sheet Data Sheet, Rev. 6.1, 08/2012.
44
Freescale Semiconductor, Inc.