K10P64M50SF0 Datasheet, PDF (56/61 Pages) Freescale Semiconductor, Inc – K10 Sub-Family

Pinout
64 64 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
MAP LQFP
BGA
UART0_COL_
b
E6 39 PTB16
TSI0_CH9 TSI0_CH9 PTB16
UART0_RX
EWM_IN
D7 40 PTB17
TSI0_CH10 TSI0_CH10 PTB17
UART0_TX
EWM_OUT_b
D6 41 PTB18
TSI0_CH11 TSI0_CH11 PTB18
I2S0_TX_
BCLK
C7 42 PTB19
TSI0_CH12 TSI0_CH12 PTB19
I2S0_TX_FS
D8 43 PTC0
ADC0_SE14/ ADC0_SE14/ PTC0
TSI0_CH13 TSI0_CH13
SPI0_PCS4 PDB0_EXTRG
C6 44 PTC1/
LLWU_P6
ADC0_SE15/ ADC0_SE15/ PTC1/
TSI0_CH14 TSI0_CH14 LLWU_P6
SPI0_PCS3 UART1_RTS_ FTM0_CH0
b
I2S0_TXD0
B7 45 PTC2
ADC0_SE4b/ ADC0_SE4b/ PTC2
CMP1_IN0/ CMP1_IN0/
TSI0_CH15 TSI0_CH15
SPI0_PCS2 UART1_CTS_ FTM0_CH1
b
I2S0_TX_FS
C8 46 PTC3/
LLWU_P7
CMP1_IN1 CMP1_IN1 PTC3/
LLWU_P7
SPI0_PCS1 UART1_RX FTM0_CH2
I2S0_TX_
BCLK
E3 47 VSS
VSS
VSS
E4 48 VDD
VDD
VDD
B8 49 PTC4/
LLWU_P8
DISABLED
PTC4/
LLWU_P8
SPI0_PCS0 UART1_TX FTM0_CH3
CMP1_OUT
A8 50 PTC5/
LLWU_P9
DISABLED
PTC5/
LLWU_P9
SPI0_SCK LPTMR0_
ALT2
I2S0_RXD0
CMP0_OUT
A7 51 PTC6/
CMP0_IN0 CMP0_IN0 PTC6/
SPI0_SOUT PDB0_EXTRG I2S0_RX_
LLWU_P10
LLWU_P10
BCLK
I2S0_MCLK
B6 52 PTC7
CMP0_IN1 CMP0_IN1 PTC7
SPI0_SIN
I2S0_RX_FS
A6 53 PTC8
CMP0_IN2 CMP0_IN2 PTC8
I2S0_MCLK
B5 54 PTC9
CMP0_IN3 CMP0_IN3 PTC9
I2S0_RX_
BCLK
B4 55 PTC10
DISABLED
PTC10
I2S0_RX_FS
A5 56 PTC11/
DISABLED
LLWU_P11
PTC11/
LLWU_P11
C3 57 PTD0/
DISABLED
LLWU_P12
PTD0/
SPI0_PCS0 UART2_RTS_
LLWU_P12
b
A4 58 PTD1
ADC0_SE5b ADC0_SE5b PTD1
SPI0_SCK UART2_CTS_
b
C2 59 PTD2/
DISABLED
LLWU_P13
PTD2/
SPI0_SOUT UART2_RX
LLWU_P13
B3 60 PTD3
DISABLED
PTD3
SPI0_SIN UART2_TX
A3 61 PTD4/
DISABLED
LLWU_P14
PTD4/
SPI0_PCS1 UART0_RTS_ FTM0_CH4
LLWU_P14
b
EWM_IN
C1 62 PTD5
ADC0_SE6b ADC0_SE6b PTD5
SPI0_PCS2
UART0_CTS_
b/
UART0_COL_
b
FTM0_CH5
EWM_OUT_b
B2 63 PTD6/
ADC0_SE7b ADC0_SE7b PTD6/
SPI0_PCS3 UART0_RX FTM0_CH6
LLWU_P15
LLWU_P15
FTM0_FLT0
K10 Sub-Family Data Sheet, Rev. 4 5/2012.
56
Freescale Semiconductor, Inc.