K10P64M50SF0 Datasheet, PDF (55/61 Pages) Freescale Semiconductor, Inc – K10 Sub-Family

64 64 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
MAP LQFP
BGA
F2 12 ADC0_DM3 ADC0_DM3 ADC0_DM3
F4 13 VDDA
VDDA
VDDA
G4 14 VREFH
VREFH
VREFH
G3 15 VREFL
VREFL
VREFL
F3 16 VSSA
VSSA
VSSA
H1 17 VREF_OUT/ VREF_OUT/ VREF_OUT/
CMP1_IN5/ CMP1_IN5/ CMP1_IN5/
CMP0_IN5 CMP0_IN5 CMP0_IN5
H2 18 CMP1_IN3/ CMP1_IN3/ CMP1_IN3/
ADC0_SE23 ADC0_SE23 ADC0_SE23
H3 19 XTAL32
XTAL32
XTAL32
H4 20 EXTAL32 EXTAL32 EXTAL32
H5 21 VBAT
VBAT
VBAT
D3 22 PTA0
JTAG_TCLK/ TSI0_CH1 PTA0
SWD_CLK/
EZP_CLK
UART0_CTS_
b/
UART0_COL_
b
FTM0_CH5
D4 23 PTA1
JTAG_TDI/ TSI0_CH2 PTA1
EZP_DI
UART0_RX FTM0_CH6
E5 24 PTA2
JTAG_TDO/ TSI0_CH3 PTA2
TRACE_SWO/
EZP_DO
UART0_TX FTM0_CH7
D5 25 PTA3
JTAG_TMS/ TSI0_CH4 PTA3
SWD_DIO
UART0_RTS_ FTM0_CH0
b
G5 26 PTA4/
LLWU_P3
NMI_b/
TSI0_CH5
EZP_CS_b
PTA4/
LLWU_P3
FTM0_CH1
F5 27 PTA5
DISABLED
PTA5
FTM0_CH2
H6 28 PTA12
DISABLED
PTA12
FTM1_CH0
G6 29 PTA13/
LLWU_P4
G7 30 VDD
H7 31 VSS
H8 32 PTA18
G8 33 PTA19
DISABLED
VDD
VSS
EXTAL0
XTAL0
VDD
VSS
EXTAL0
XTAL0
PTA13/
LLWU_P4
PTA18
PTA19
FTM1_CH1
FTM0_FLT2 FTM_CLKIN0
FTM1_FLT0 FTM_CLKIN1
F8 34 RESET_b
F7 35 PTB0/
LLWU_P5
F6 36 PTB1
E7 37 PTB2
E8 38 PTB3
RESET_b
ADC0_SE8/
TSI0_CH0
ADC0_SE9/
TSI0_CH6
ADC0_SE12/
TSI0_CH7
ADC0_SE13/
TSI0_CH8
RESET_b
ADC0_SE8/
TSI0_CH0
ADC0_SE9/
TSI0_CH6
ADC0_SE12/
TSI0_CH7
ADC0_SE13/
TSI0_CH8
PTB0/
LLWU_P5
PTB1
PTB2
PTB3
I2C0_SCL
I2C0_SDA
I2C0_SCL
I2C0_SDA
FTM1_CH0
FTM1_CH1
UART0_RTS_
b
UART0_CTS_
b/
Pinout
ALT5
ALT6
ALT7
EzPort
JTAG_TCLK/ EZP_CLK
SWD_CLK
JTAG_TDI EZP_DI
JTAG_TDO/ EZP_DO
TRACE_SWO
JTAG_TMS/
SWD_DIO
NMI_b
EZP_CS_b
I2S0_TX_
BCLK
I2S0_TXD0
I2S0_TX_FS
JTAG_TRST_
b
FTM1_QD_
PHA
FTM1_QD_
PHB
LPTMR0_
ALT1
FTM1_QD_
PHA
FTM1_QD_
PHB
FTM0_FLT3
FTM0_FLT0
K10 Sub-Family Data Sheet, Rev. 4 5/2012.
Freescale Semiconductor, Inc.
55