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MC9S12DP512 Datasheet, PDF (55/124 Pages) Freescale Semiconductor, Inc – Microcontroller Unit (MCU)
Freescale SemiconductorM,CI9nS1c2.DP512 Device Guide V01.23
Pin Name
Funct. 1
PS7
PS6
PS5
PS4
PS3
PS2
PS1
PS0
PT[7:0]
Pin Name
Funct. 2
SS0
SCK0
MOSI0
MISO0
TXD1
RXD1
TXD0
RXD0
IOC[7:0]
Pin Name Pin Name Pin Name Power
Funct. 3 Funct. 4 Funct. 5 Supply
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—
—
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—
—
—
—
—
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VDDX
—
—
—
—
—
—
—
—
—
—
—
—
—
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VDDX
Internal Pull
Resistor
CTRL
Reset
State
Description
Port S I/O, SS of SPI0
Port S I/O, SCK of SPI0
Port S I/O, MOSI of SPI0
PERS/
PPSS
Port S I/O, MISO of SPI0
Up
Port S I/O, TXD of SCI1
Port S I/O, RXD of SCI1
Port S I/O, TXD of SCI0
Port S I/O, RXD of SCI0
PERT/
PPST
Disabled Port T I/O, Timer channels
2.3 Detailed Signal Descriptions
2.3.1 EXTAL, XTAL — Oscillator Pins
EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived
from the EXTAL input frequency. XTAL is the crystal output.
2.3.2 RESET — External Reset Pin
An active low bidirectional control signal, it acts as an input to initialize the MCU to a known start-up
state, and an output when an internal MCU function causes a reset.
2.3.3 TEST — Test Pin
This input only pin is reserved for test.
NOTE: The TEST pin must be tied to VSS in all applications.
2.3.4 VREGEN — Voltage Regulator Enable Pin
This input only pin enables or disables the on-chip voltage regulator.
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