33926 Datasheet, PDF (4/24 Pages) Freescale Semiconductor, Inc – 5.0 A Throttle Control H-Bridge

PIN CONNECTIONS
Table 1. 33926 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Description section beginning on page 11.
Pin
Pin
Pin Name _Function
Formal Name
Definition
12, 13,
14, 15
16
OUT1
D2
Power
Output
Logic Input
H-Bridge Output 1
Disable Input 2
(Active Low)
Source of high-side MOSFET1 and drain of low-side MOSFET1.
When D2 is logic LOW, both OUT1 and OUT2 are tri-stated. (Schmitt trigger
input with ~80 µA sink so default condition = disabled.)
18 – 20,
22 – 24
21
26
PGND
SF
D1
Power
Ground
Power Ground
Logic
Output -
Open Drain
Logic Input
Status Flag
(Active Low)
Disable Input 1
(Active High)
High-current power ground pins must be connected together physically as
close as possible and directly soldered down to a wide, thick, low resistance
ground plane on the PCB.
Open drain active LOW Status Flag output (requires an external pullup resistor
to V_DD. Maximum permissible load current < 0.5 mA. Maximum V_CEsat
< 0.4 V @ 0.3 mA. Maximum permissible pullup voltage < 7.0 V.)
When D1 is logic HIGH, both OUT1 and OUT2 are tri-stated. Schmitt trigger
input with ~80 µA source so default condition = disabled.
27, 28,
29, 30
32
OUT2
CCP
Power
Output
Analog
Output
H-Bridge Output 2 _{Source of high-side MOSFET2 and drain of low-side MOSFET2.}
Charge Pump
Capacitor
External reservoir capacitor connection for internal charge pump; connected to
VPWR. Allowable values are 30 nF to 100 nF. Note This capacitor is required
for the proper performance of the device.
33926
4
Analog Integrated Circuit Device Data
Freescale Semiconductor