33926 Datasheet, PDF (19/24 Pages) Freescale Semiconductor, Inc – 5.0 A Throttle Control H-Bridge

ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
33926
Introduction
This thermal addendum is provided as a supplement to the MC33926 technical
datasheet. The addendum provides thermal performance information that may be
critical in the design and development of system applications. All electrical,
application, and packaging information is provided in the datasheet.
Packaging and Thermal Considerations
The MC33926 is offered in a 32 pin PQFN, single die package. There is a single
heat source (P), a single junction temperature (T_J), and thermal resistance (R_θJA).
T_J = _RθJA . _P
The stated values are solely for a thermal performance comparison of one
package to another in a standardized environment. This methodology is not meant
to and will not predict the performance of a package in an application-specific
environment. Stated values were obtained by measurement and simulation
according to the standards listed below.
32-PIN
PQFN
PNB SUFFIX
98ARL10579D
32-PIN PQFN
8.0 mm x 8.0 mm
Note For package dimensions, refer to
the 33926 data sheet.
Standards
Table 6. Thermal Performance Comparison
Thermal Resistance
[°C/W]
R_θJA^(1),(2)
28
R_θJB ^(2),(3)
12
R_θJA ^{(1), (4)}
80
R_θJC ⁽⁵⁾
1.0
Notes:
1. Per JEDEC JESD51-2 at natural convection, still air
condition.
2. 2s2p thermal test board per JEDEC JESD51-5 and
JESD51-7.
3. Per JEDEC JESD51-8, with the board temperature on the
center trace near the center lead.
4. Single layer thermal test board per JEDEC JESD51-3 and
JESD51-5.
5. Thermal resistance between the die junction and the
exposed pad surface; cold plate attached to the package
bottom side, remaining surfaces insulated.
1.0
0.2
1.0
0.2
* All measurements
are in millimeters
Figure 14. Surface Mount for Power PQFN
with Exposed Pads
Analog Integrated Circuit Device Data
Freescale Semiconductor
33926
19