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MCF5272 Datasheet, PDF (386/544 Pages) Motorola, Inc – MCF5272 ColdFire Integrated Microprocessor Users Manual
UART Modules
In either mode, reading the USRn does not affect the FIFO. The FIFO is popped only when the receive
buffer is read. The USRn should be read before reading the receive buffer. If all 24 receiver holding
registers are full, a new character is held in the receiver shift register until space is available. However, if
a second new character is received, the character in the receiver shift register is lost, the FIFO is unaffected,
and USRn[OE] is set when the receiver detects the start bit of the new overrunning character.
Visibility into the status of the FIFO is provided by various bits and interrupts, as shown in Table 16-17.
Table 16-17. Receiver FIFO Status Bits
Status Bit
USR[FFULL] = 1
USR[RxRDY] = 1
USR[RxFIFO] = 1
USR[RxFTO] = 1
URF[RXS]
URF[RXB]
Indicated Condition
All FIFO positions contain data
At least one character is available to be read by the CPU.
The programmed level of fullness (UTF[RXS]) has been reached.
The receiver FIFO holds unread data, and the FIFO status
has not changed in at least 64 receiver clocks.
Indicates the level of fullness of the receiver FIFO
Indicates the number of characters, 0–24, in the receiver FIFO.
Interrupt
Yes
Yes
Yes
Yes
To support flow control, the receiver can be programmed to automatically negate and assert RTS, in which
case the receiver automatically negates RTS when a valid start bit is detected and the FIFO stack is full.
The receiver asserts RTS when a FIFO position becomes available; therefore, overrun errors can be
prevented by connecting RTS to the CTS input of the transmitting device.
NOTE
The receiver can still read characters in the FIFO stack if the receiver is
disabled. If the receiver is reset, the FIFO stack, RTS control, all receiver
status bits, and interrupt requests are reset. No more characters are received
until the receiver is reenabled.
16.5.3 Looping Modes
The UART can be configured to operate in various looping modes as shown in Figure 16-26. These modes
are useful for local and remote system diagnostic functions and are described in the following paragraphs
and in Section 16.3, “Register Descriptions.”
The UART’s transmitter and receiver should be disabled when switching between modes, as the selected
mode is activated immediately upon mode selection, regardless of whether a character is being received
or transmitted.
16-26
MCF5272 ColdFire® Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor