56F8037 Datasheet, PDF (37/180 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

56F8037 Signal Pins
Table 2-3 56F8037 Signal and Package Information for the 64-Pin LQFP (Continued)
Signal LQFP
Name Pin No.
Type
State During
Reset
Signal Description
GPIOD5
52
(XTAL)
(CLKIN)
GPIOD6
18
(DAC0)
GPIOD7
15
(DAC1)
TDI
59
(GPIOD0)
TDO
64
(GPIOD1)
Input/
Output
Analog
Input/
Output
Input
Input/
Output
Analog
Input
Input/
Output
Analog
Input
Input
Input/
Output
Output
Input/
Output
Input
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
External Crystal Oscillator Output — This output connects the
internal crystal oscillator output to an external crystal.
External Clock Input — This pin serves as an external clock input.
After reset, the default state is GPIOD5.
Input,
internal
pull-up
enabled
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
DAC0— Digital-to-Analog Converter output 0.
After reset, the default state is GPIOD6.
Input,
internal
pull-up
enabled
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
DAC1— Digital-to-Analog Converter output 1.
After reset, the default state is GPIOD7.
Input,
internal
pull-up
enabled
Test Data Input — This input pin provides a serial input data stream
to the JTAG/EOnCE port. It is sampled on the rising edge of TCK
and has an on-chip pull-up resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TDI.
Output
tri-stated,
internal
pull-up
enabled
Test Data Output — This tri-stateable output pin provides a serial
output data stream from the JTAG/EOnCE port. It is driven in the
shift-IR and shift-DR controller states, and changes on the falling
edge of TCK.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TDO.
Return to Table 2-2
56F8037 Data Sheet, Rev. 2
Freescale Semiconductor
37
Preliminary