MC33905D Datasheet, PDF (34/766 Pages) Freescale Semiconductor, Inc – SBC Gen2 with CAN High Speed and LIN Interface

Overview
— Memory-based flexible descriptor rings
— Media-independent interface (MII) to transceiver (PHY)
• FlexCAN 2.0B Module
— Includes all existing features of the Freescale TouCAN module
— Full implementation of the CAN protocol specification version 2.0B
– Standard data and remote frames (up to 109 bits long)
– Extended data and remote frames (up to 127 bits long)
– 0–8 bytes data length
– Programmable bit rate up to 1 Mbit/sec
— Up to 16 message buffers (MBs)
– Configurable as receive (Rx) or transmit (Tx)
– Support standard and extended messages
— Unused message buffer (MB) space can be used as general-purpose RAM space
— Listen-only mode capability
— Content-related addressing
— No read/write semaphores
— Three programmable mask registers
– Global (for MBs 0-13)
– Special for MB14
– Special for MB15
— Programmable transmit-first scheme: lowest ID or lowest buffer number
— “Time stamp” based on 16-bit free-running timer
— Global network time, synchronized by a specific message
— Programmable I/O modes
— Maskable interrupts
• Three universal asynchronous/synchronous receiver transmitters (UARTs)
— 16-bit divider for clock generation
— Interrupt control logic
— Maskable interrupts
— DMA support
— Data formats can be 5, 6, 7, or 8 bits with even, odd, or no parity
— Up to 2 stop bits in 1/16 increments
— Error-detection capabilities
— Modem support includes request-to-send (URTS) and clear-to-send (UCTS) lines for two
UARTs
— Transmit and receive FIFO buffers
• I²C module
— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, and keypads
— Fully compatible with industry-standard I²C bus
— Master or slave modes support multiple masters
— Automatic interrupt generation with programmable level
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
1-2
Freescale Semiconductor