908E626_09 Datasheet, PDF (29/44 Pages) Freescale Semiconductor, Inc – Integrated Stepper Motor Driver with Embedded MCU and LIN Serial Communication

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Coil Current
Voltage on ¹
1
BEMF Signal
Figure 15. BEMF Signal Generation
HALF-BRIDGE OVERTEMPERATURE
PROTECTION
The half-bridge outputs provide an over-temperature pre-
warning with the HTF in the Interrupt Flag Register (IFR). In
order to protect the outputs against over-temperature, the
High Temperature Reset must be enabled. If this value is
reached, the part generates a reset and disables all power
outputs.
HALF-BRIDGE OVER-CURRENT PROTECTION
The half-bridges are protected against short to GND, short
to VSUP, and load shorts.
In the event an over-current on the high side is detected,
the high side MOSFETs on all HB high side MOSFETs are
switched off automatically. In the event an over-current on the
low side is detected, all HB low side MOSFETs are switched
off automatically. In both cases, the over-current status flag
HB_OCF in the System Status Register (SYSSTAT) is set.
The over-current status flag is cleared (and the outputs re-
enabled) by writing a logic [1] to the HB_OCF flag in the
System Status Register or by reset.
HALF-BRIDGE OVER-VOLTAGE / UNDER-
VOLTAGE
The half-bridge outputs are protected against under-
voltage and over-voltage conditions. This protection is done
by the low and high voltage interrupt circuitry. If one of these
flags (LVF, HVF) is set, the outputs are automatically
disabled.
The over-voltage / under-voltage status flags are cleared
(and the outputs re-enabled) by writing a logic [1] to the LVF /
HVF flags in the Interrupt Flag Register or by reset. Clearing
this flag is useless as long as a high or low voltage condition
is present.
Half-bridge Control Register (HBCTL)
Register Name and Address: HBCTL - $02
Bit 7
6
5
4
3
2
1 Bit0
Read
0
0
0
OFC_EN CSA
CLS2 CLS1 CLS0
Write
Reset 0
0
0
0
0
0
0
0
OFC_EN — H-bridge Offset Chopping Enable Bit
This read / write bit enables offset chopping. Reset clears
the OFC_EN bit.
• 1 = Offset chopping enabled.
• 0 = Offset chopping disabled.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E626
29