908E626_09 Datasheet, PDF (22/44 Pages) Freescale Semiconductor, Inc – Integrated Stepper Motor Driver with Embedded MCU and LIN Serial Communication

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
After a write operation, the transmitted data is latched into
the register by the rising edge of SS. Register read data is
internally latched into the SPI at the time when the parity bit
is transferred. SS HIGH forces MISO to high impedance.
MASTER ADDRESS BYTE
A4 : A0
Contains the address of the desired register.
R/W
Contains information about a read or a write operation.
• If R/W = 1, the second byte of master contains no valid
information, slave just transmits back register data.
• If R/W = 0, the master sends data to be written in the
second byte, slave sends concurrently contents of
selected register prior to write operation, write data is
latched in the SMARTMOS register on rising edge of
SS.
Parity P
The parity bit is equal to “0” if the number of 1 bits is an
even number contained within R/ W, A4 : A0. If the number of
1 bits is odd, P equals “1”. For example, if R/ W = 1, A4 : A0 =
00001, then P equals “0.”
The parity bit is only evaluated during a write operation.
Bit X
Not used.
Master Data Byte
Contains data to be written or no valid data during a read
operation.
908E626
22
Analog Integrated Circuit Device Data
Freescale Semiconductor