MC9S08PT60 Datasheet, PDF (28/37 Pages) Freescale Semiconductor, Inc – MC9S08PT60

Peripheral operating requirements and behaviors
SS
(INPUT)
SPSCK
(CPOL = 0)
(INPUT)
SPSCK
(CPOL = 1)
(INPUT)
8
MISO
(OUTPUT)
2
12
3
5
5
12
10
nsoetee
SLAVE MSB ^{BIT 6 . . . 1}
13 4
13
9
11
11
SLAVE LSB OUT
SEE
NOTE
MOSI
(INPUT)
6
7
MSB IN
BIT 6 . . . 1
LSB IN
NOTE: Not defined!
Figure 15. SPI slave mode timing (CPHA = 0)
SS
(INPUT)
SPSCK
(CPOL = 0)
(INPUT)
SPSCK
(CPOL = 1)
(INPUT)
MISO
(OUTPUT)
MOSI
(INPUT)
2
3
12
5
5
12
10
nsoetee ^{SLAVE MSB OUT}
8
6
7
MSB IN
11
BIT 6 . . . 1
BIT 6 . . . 1
4
13
13
9
SLAVE LSB OUT
LSB IN
NOTE: Not defined!
Figure 16. SPI slave mode timing (CPHA=1)
6.5 Human-machine interfaces (HMI)
MC9S08PT60 Series Data Sheet, Rev. 3, 4/2012.
28
Freescale Semiconductor, Inc.