K40P144M100SF2_11 Datasheet, PDF (28/75 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Peripheral operating requirements and behaviors
Table 13. MCG specifications (continued)
Symbol
D_lock
D_unl
t_{pll_lock}
Description
Lock entry frequency tolerance
Lock exit frequency tolerance
Lock detector detection time
Min.
± 1.49
± 4.47
—
Typ.
—
—
—
Max.
± 2.98
± 5.97
0.15 +
1075(1/
f_{pll_ref})
Unit
%
%
ms
Notes
11
1. This parameter is measured with the internal reference (slow clock) being used as a reference to the FLL (FEI clock
mode).
2. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32=0.
3. The resulting system clock frequencies should not exceed their maximum specified values. The DCO frequency deviation
(Δf_{dco_t}) over voltage and temperature should be considered.
4. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32=1.
5. The resulting clock frequency must not exceed the maximum specified clock frequency of the device.
6. This specification was obtained at TBD frequency.
7. This specification applies to any time the FLL reference source or reference divider is changed, trim value is changed,
DMX32 bit is changed, DRS bits are changed, or changing from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE,
FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running.
8. Excludes any oscillator currents that are also consuming power while PLL is in operation.
9. This specification was obtained using a Freescale developed PCB. PLL jitter is dependent on the noise characteristics of
each PCB and results will vary.
10. This specification was obtained at internal frequency of TBD.
11. This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL disabled
(BLPE, BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this specification assumes
it is already running.
6.3.2 Oscillator electrical specifications
This section provides the electrical characteristics of the module.
6.3.2.1 Oscillator DC electrical specifications
Table 14. Oscillator DC electrical specifications
Symbol
V_DD
I_DDOSC
Description
Supply voltage
Supply current — low-power mode (HGO=0)
• 32 kHz
• 4 MHz
• 8 MHz
• 16 MHz
• 24 MHz
• 32 MHz
Min.
1.71
—
—
—
—
—
—
Typ.
—
500
200
300
700
1.2
1.5
Max.
3.6
—
—
—
—
—
—
Unit
Notes
V
1
nA
μA
μA
μA
mA
mA
Table continues on the next page...
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
28
Preliminary
Freescale Semiconductor, Inc.