English
Language : 

MC9S08JE128 Datasheet, PDF (27/44 Pages) Freescale Semiconductor, Inc – Covers: MC9S08JE128 and MC9S08JE64
Preliminary Electrical Characteristics
Table 16. 12-bit SAR ADC Characteristics full operating range
(VREFH = VDDAD, > 1.8, VREFL = VSSAD ≤ 8 MHz)
Characterist
ic
Conditions1
Symb Min
Typ2
Max
Unit
C
Supply
Current
Supply
Current
ADLPC=1, ADHSC=0
ADLPC=0, ADHSC=0
ADLPC=0, ADHSC=1
Stop, Reset, Module Off
—
215
—
IDDAD
—
470
—
—
610
—
IDDAD
—
0.01
—
μA
T
μA
C
ADC
Asynchronou
s Clock
Source
ADLPC=1, ADHSC=0
ADLPC=0, ADHSC=0
ADLPC=0, ADHSC=1
—
2.4
—
fADACK
—
5.2
—
MHz P
—
6.2
—
Sample Time See Block Guide for sample times
Conversion
Time
Total
Unadjusted
Error
See Block Guide for conversion times
12-bit single-ended mode
TUE
—
±1.75 ±3.5 LSB3 T
Comment
ADLSMP=0
ADCO=1
tADACK =
1/fADACK
32x
Hardware
Averaging
(AVGE = %1
AVGS =
%11)
11-bit differential mode
10-bit single-ended mode
9-bit differential mode
8-bit single-ended mode
Differential
12-bit single-ended mode
Non-Linearity
11-bit differential mode
10-bit single-ended mode
9-bit differential mode
8-bit single-ended mode
Integral
12-bit single-ended mode
Non-Linearity
—
±0.7 ±1.5
T
—
±0.8 ±1.5
—
±0.5 ±1.0
T
—
±0.5 ±1.0
DNL
—
±0.7
±1
LSB2 T
—
±0.5 ±0.75
T
—
±0.5 ±0.75
—
±0.2 ±0.5
T
—
±0.2 ±0.5
INL
—
±1.0
±2.5 LSB2 T
11-bit differential mode
10-bit single-ended mode
9-bit differential mode
8-bit single-ended mode
—
±0.5 ±1.0
T
—
±0.5 ±1.0
—
±0.3 ±0.5
T
—
±0.3 ±0.5
Freescale Semiconductor
27
Non-Disclosure Agreement Required
Preliminary — Subject to Change