56F8365 Datasheet, PDF (26/172 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Signal
Name
HOME0
(TA3)
(GPIOC7)
SCLK0
(GPIOE4)
MOSI0
(GPIOE5)
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Pin No.
Type
State
During
Reset
Signal Description
2
Schmitt
Input,
Home — Quadrature Decoder 0, HOME input
Input
pull-up
enabled
Schmitt
TA3 — Timer A, Channel 3
Input/
Output
Schmitt
Input/
Output
Port C GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is HOME0.
To deactivate the internal pull-up resistor, clear bit 7 of the
GPIOC_PUR register.
124
Schmitt
Input,
SPI 0 Serial Clock — In the master mode, this pin serves as an
Input/
pull-up output, clocking slaved listeners. In slave mode, this pin serves as
Output
enabled the data clock input.
Schmitt
Input/
Output
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SCLK0.
To deactivate the internal pull-up resistor, clear bit 4 in the
GPIOE_PUR register.
126
Input/
In reset, SPI 0 Master Out/Slave In — This serial data pin is an output
Output
output is from a master device and an input to a slave device. The master
disabled, device places data on the MOSI line a half-cycle before the clock
pull-up is edge the slave device uses to latch the data.
enabled
Input/
Port E GPIO — This GPIO pin can be individually programmed as
Output
an input or output pin.
After reset, the default state is MOSI0.
To deactivate the internal pull-up resistor, clear bit 5 in the
GPIOE_PUR register.
56F8365 Technical Data, Rev. 6.0
26
Freescale Semiconductor
Preliminary