MC9S12XEP100MAG Datasheet, PDF (232/1324 Pages) Freescale Semiconductor, Inc – Reference Manual Covers MC9S12XE Family

Chapter 4 Memory Protection Unit (S12XMPUV1)
4.3.1.2 MPU Address Status Register 0 (MPUASTAT0)
Address: Module Base + 0x0001
7
6
5
4
3
2
1
0
R
0
ADDR[22:16]
W
Reset
0
0
0
0
0
0
0
0
Figure 4-4. MPU Address Status Register 0 (MPUASTAT0)
Read: Anytime
Write: Never
Table 4-4. MPUASTAT0 Field Descriptions
Field
Description
6–0
Access violation address bits — The ADDR[22:16] bits contain bits [22:16] of the global address which
ADDR[22:16] caused the current access violation interrupt. These bits are undefined if the access error flag bit (AEF) in the
MPUFLG register is not set.
4.3.1.3 MPU Address Status Register 1 (MPUASTAT1)
Address: Module Base + 0x0002
7
6
5
4
3
2
1
0
R
ADDR[15:8]
W
Reset
0
0
0
0
0
0
0
0
Figure 4-5. MPU Address Status Register 1 (MPUASTAT1)
Read: Anytime
Write: Never
Table 4-5. MPUASTAT1 Field Descriptions
Field
Description
7–0
Access violation address bits — The ADDR[15:8] bits contain bits [15:8] of the global address which caused
ADDR[15:8] the current access violation interrupt. These bits are undefined if the access error flag bit (AEF) in the MPUFLG
register is not set.
MC9S12XE-Family Reference Manual Rev. 1.25
232
Freescale Semiconductor