MC9S12XEP100MAG Datasheet, PDF (137/1324 Pages) Freescale Semiconductor, Inc – Reference Manual Covers MC9S12XE Family

2.3.45 Port P Data Register (PTP)
Chapter 2 Port Integration Module (S12XEPIMV1)
Address 0x0258
R
W
Altern.
Function
Reset
7
PTP7
PWM7
SCK2
0
1. Read: Anytime.
Write: Anytime.
6
PTP6
5
PTP5
4
PTP4
3
PTP3
2
PTP2
PWM6
SS2
0
PWM5
PWM4
PWM3
PWM2
MOSI2
MISO2
SS1
SCK1
0
0
0
0
Figure 2-43. Port P Data Register (PTP)
Access: User read/write⁽¹⁾
1
0
PTP1
PTP0
PWM1
MOSI1
0
PWM0
MISO1
0
Field
7
PTP
6
PTP
5
PTP
4
PTP
Table 2-41. PTP Register Field Descriptions
Description
Port P general purpose input/output data—Data Register
Port P pin 6 is associated with the PWM output channel 7 and the SCK signal of SPI2.
The PWM function takes precedence over the SPI2 and the general purpose I/O function if the PWM channel 7 is
enabled. The SPI2 function takes precedence of the general purpose I/O function if the routed SPI2 is enabled.
When not used with the alternative functions, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
Port P general purpose input/output data—Data Register
Port P pin 6 is associated with the PWM output channel 6 and the SS signal of SPI2.
The PWM function takes precedence over the SPI2 and the general purpose I/O function if the PWM channel 6 is
enabled. The SPI2 function takes precedence of the general purpose I/O function if the routed SPI2 is enabled.
When not used with the alternative functions, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
Port P general purpose input/output data—Data Register
Port P pin 5 is associated with the PWM output channel 5 and the MOSI signal of SPI2.
The PWM function takes precedence over the SPI2 and the general purpose I/O function if the PWM channel 5 is
enabled. The SPI2 function takes precedence of the general purpose I/O function if the routed SPI2 is enabled.
When not used with the alternative functions, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
Port P general purpose input/output data—Data Register
Port P pin 4 is associated with the PWM output channel 4 and the MISO signal of SPI2.
The PWM function takes precedence over the SPI2 and the general purpose I/O function if the PWM channel 4 is
enabled. The SPI2 function takes precedence of the general purpose I/O function if the routed SPI2 is enabled.
When not used with the alternative functions, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
137