LP1072 Datasheet, PDF (21/32 Pages) Freescale Semiconductor, Inc – 802.11a/b/g Baseband System Solution

Pad Name
IADCINN
IADCINP
QADCINN
QADCINP
RSSIADCIN
VOCM
AUXDACOUT
IDACOUTP
IDACOUTN
QDACOUTP
QDACOUTN
EXT_BIAS
TCXO Squarer
AVDD_TCXO
AVSS_TCXO
CLKIN
RF Interface Signals
RF_ANALOG_LDO
RF_EN
RF_RXEN
RF_TXEN
RF_PAEN1
RF_PAEN2
RF_SPARE1
RF_SPARE2
RF_VGA6
RF_VGA5
RF_VGA4
RF_VGA3
RF_VGA2
RF_VGA1
RF_VGA0
RF_RXHP
RF_ANTENNA_SEL
RF_ANTENNA_SEL_N
Pinout and Footprint
Table 9. Pin Description (continued)
Pad Type
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
Direction
Description
Pin
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
Output
Input
Negative input of I-ADC
A8
Positive input of I-ADC
B8
Negative input of Q-ADC
B6
Positive input of Q-ADC
C6
RSSI ADC input
B1
Input pin for definition of IQDAC output common -mode level D9
Auxiliary DAC output
C4
Positive output of I-DAC
B9
Negative output of I-DAC
C9
Positive output of Q-DAC
B10
Negative output of Q-DAC
A10
External Bias for test
D4
pvdd3p
N/A Analog 3.3 volt
F4
pvss3p
N/A Analog ground
G5
pdiana2p
Input TCXO reference clock input
F1
pdb04dgz
Bi-dir LDO enable for RF VCO power. Driven by PHY controller.
M9
pdb04dgz
Bi-dir RF enable. Driven by PHY controller.
R12
pdb04dgz
Bi-dir RF Rx enable. Driven by PHY controller.
P11
pdb04dgz
Bi-dir RF Tx enable. Driven by PHY controller.
N13
pdb04dgz
Bi-dir RF PA enable 1. Driven by PHY controller.
P14
pdb04dgz
Bi-dir RF PA enable 2. Driven by PHY controller.
M13
pdb04dgz
Bi-dir RF spare 1 (not used). Driven by PHY controller.
L12
pdb04dgz
Bi-dir RF spare 2 (not used). Driven by PHY controller.
G13
pdb04dgz
Bi-dir RF VGA setting. Driven by UWA.
M14
pdb04dgz
Bi-dir RF VGA setting. Driven by UWA.
N15
pdb04dgz
Bi-dir RF VGA setting. Driven by UWA.
M15
pdo02cdg Output RF VGA setting. Driven by UWA.
K13
pdo02cdg Output RF VGA setting. Driven by UWA.
L14
pdo02cdg Output RF VGA setting. Driven by UWA.
L15
pdo02cdg Output RF VGA setting. Driven by UWA.
J13
pdo02cdg Output RF Rx highpass filter setting. Driven by UWA.
H12
pdo02cdg Output RF antenna select. Driven by ARM.
H13
pdo02cdg Output RF antenna select. Driven by ARM.
J15
LP1072 Advance Information, Rev. 0.3
Freescale Semiconductor
21
PRELIMINARY