LP1072 Datasheet, PDF (10/32 Pages) Freescale Semiconductor, Inc – 802.11a/b/g Baseband System Solution

LP1072 Interfaces
3.4.5 Aux DAC
AUX DAC specifications are shown in Table 7.
Table 7. Aux DAC Specifications
Parameter
Condition
Min
Typ
Max
Units
Resolution
—
—
8
—
bit
Maximum Update rate
Output voltage for full scale input¹
—
20
—
—
MHz
—
0.1
—
2.4
V
Load
—
5
—
—
kOhm
—
—
—
10
pF
Propagation delay (tpd)
—
—
5
—
ns
Settling time (ts)
—
—
80
—
ns
Integral Nonlinearity (INL)
—
—
±1.0
—
LSB
Differential Nonlinearity (DNL)
—
—
± 0.5
—
LSB
ENOB
Fin = 1 MHz
—
7.2
—
bit
Wake-up time
From Shutdown
—
—
10
µs
From Standby
—
—
2
µs
1 _{Due to saturation of the output buffer, INL and DNL are not applicable for output voltages below 200 mV. Output is monotonic}
above 0.1 V.
4 LP1072 Interfaces
4.1 SDIO Host Interface
The LP1072 supports SDIO Card Specifications, Version 1.00 (http//www.sdcard.org). The LP1072 SDIO
host interface supports the I/O mode of the SD Card Specifications.
4.1.1 SDIO Supported Features
The features supported by the LP1072 SDIO host interface are:
• SD 1-Bit Mode
• SD 4-Bit Mode
• Low Speed
• Full Speed (25 MHz)
• Interrupt
• CMD52 during Data Transfer
• CMD53 Multi Block Transfer
• Interrupt during 4-bit Multiple Block Data Transfer
LP1072 Advance Information, Rev. 0.3
10
Freescale Semiconductor
PRELIMINARY