MC9S12C_10 Datasheet, PDF (157/690 Pages) Freescale Semiconductor, Inc – Reference Manual

Chapter 5
Interrupt (INTV1) Block Description
5.1 Introduction
This section describes the functionality of the interrupt (INT) sub-block of the S12 core platform.
A block diagram of the interrupt sub-block is shown in Figure 5-1.
INT
WRITE DATA BUS
HPRIO (OPTIONAL)
HIGHEST PRIORITY
I-INTERRUPT
INTERRUPTS
XMASK
IMASK
INTERRUPT INPUT REGISTERS
AND CONTROL REGISTERS
READ DATA BUS
WAKEUP
RESET FLAGS
VECTOR REQUEST
QUALIFIED
INTERRUPTS
PRIORITY DECODER
INTERRUPT PENDING
VECTOR ADDRESS
Figure 5-1. INTV1 Block Diagram
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
157
Rev 01.24