MC9S12XF512 Datasheet, PDF (1232/1300 Pages) Freescale Semiconductor, Inc – S12X Microcontrollers

Appendix C PCB Layout Guidelines
Appendix C
PCB Layout Guidelines
The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the
MCU itself. The following rules must be observed:
• Every supply pair must be decoupled by a ceramic capacitor connected as near as possible to the
corresponding pins .
• Central point of the ground star should be the VSS2 pin.
• Use low ohmic low inductance connections between VSS1, VSS2 and VSS3.
• VSSPLL must be directly connected to VSS3.
• Keep traces of VSSPLL, EXTAL, and XTAL as short as possible and occupied board area for C7,
C8, and Q1 as small as possible.
• Do not place other signals or supplies underneath area occupied by C7, C8, and Q1 and the
connection area to the MCU.
• Central power input should be fed in at the VDDA/VSSA pins.
Example layouts are illustrated on the following pages.
Component
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
Table C-1. Recommended Decoupling Capacitor Choice
Purpose
V_DDF filter capacitor
V_DDX3 filter capacitor (LQFP144 only)
V_DDX2 filter capacitor
V_DDPLL filter capacitor
OSC load capacitor
OSC load capacitor
V_DDR filter capacitor
V_DDX4 filter capacitor (LQFP144 only)
V_DD filter capacitor
V_DDA filter capacitor
V_DDX1 filter capacitor
Type
Value
Ceramic X7R
220 nF
X7R/tantalum
X7R/tantalum
Ceramic X7R
>=100 nF
>=100 nF
220 nF
From crystal manufacturer
X7R/tantalum
X7R/tantalum
Ceramic X7R
Ceramic X7R
X7R/tantalum
>=100 nF
>=100 nF
220 nF
>=100 nF
>=100 nF
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MC9S12XF - Family Reference Manual, Rev.1.18
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