MC9RS08KA2_08 Datasheet, PDF (118/136 Pages) Freescale Semiconductor, Inc – RS08 Microcontrollers

Appendix A Electrical Characteristics
Table A-7. Internal Clock Source Specifications
Characteristic
Symbol
Min
Typ¹
Max
Unit
Stop recovery time (FLL wakeup to previous acquired
t_wakeup
frequency)
IREFSTEN=0
IREFSTEN=1
t_{ir_wu}
—
t_{fll_wu}
100
86
μs
—
1 _{Data in typical column was characterized at 3.0 V and 5.0 V, 25°C or is typical recommended value.}
2 _{This parameter is characterized and not tested on each device.}
3 _{This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing}
from FLL disabled (FBILP) to FLL enabled (FEI, FBI).
A.9 AC Characteristics
This section describes ac timing characteristics for each peripheral system.
A.9.1 Control Timing
Table A-8. Control Timing
Parameter
Symbol
Min
Typical
Max
Unit
Bus frequency (t_cyc = 1/f_Bus)
Real time interrupt internal oscillator period
External RESET pulse width¹
KBI pulse width²
KBI pulse width in stop¹
Port rise and fall time (load = 50 pF)³
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
f_Bus
t_RTI
t_extrst
t_KBIPW
t_KBIPWS
t_Rise, t_Fall
dc
700
150
1.5 t_cyc
100
—
—
—
1000
—
—
—
11
35
10
1300
—
—
—
—
—
MHz
μs
ns
ns
ns
ns
1 _{This is the shortest pulse that is guaranteed to pass through the pin input filter circuitry. Shorter pulses may or may not be}
recognized.
2 _{This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or}
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
3 _{Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40°C to 85°C.}
RESET
t_extrst
Figure A-1. Reset Timing
MC9RS08KA2 Series Data Sheet, Rev. 4
118
Freescale Semiconductor