MC9S08LL64_10 Datasheet, PDF (11/44 Pages) Freescale Semiconductor, Inc – Technical Data

ESD Protection and Latch-Up Immunity
where:
T_J = T_A + (P_D × θ_JA)
Eqn. 1
T_A = Ambient temperature, °C
θ_JA = Package thermal resistance, junction-to-ambient, °C/W
P_D = P_int + P_I/O
P_int = I_DD × V_DD, Watts — chip internal power
P_I/O = Power dissipation on input and output pins — user determined
For most applications, P_I/O << P_int and can be neglected. An approximate relationship between P_D and T_J
(if P_I/O is neglected) is:
P_D = K ÷ (T_J + 273°C)
Solving Equation 1 and Equation 2 for K gives:
Eqn. 2
K = P_D × (T_A + 273°C) + θ_JA × (P_D)²
Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring
P_D (at equilibrium) for a known T_A. Using this value of K, the values of P_D and T_J can be obtained by
solving Equation 1 and Equation 2 iteratively for any value of T_A.
3.5 ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be taken to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification, ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless instructed otherwise in the device
specification.
Table 6. ESD and Latch-up Test Conditions
Model
Description
Series resistance
Human
body model
Storage capacitance
Number of pulses per pin
Charge
device
model
Series resistance
Storage capacitance
Number of pulses per pin
Symbol
R1
C
—
R1
C
—
Value
Unit
1500
Ω
100
pF
3
0
Ω
200
pF
3
MC9S08LL64 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
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