English
Language : 

33984 Datasheet, PDF (11/38 Pages) Freescale Semiconductor, Inc – Dual Intelligent High-current Self-protected Silicon High Side Switch (4.0 mOhm)
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions 4.5 V ≤ VDD ≤ 5.5 V, 6.0 V ≤ VPWR ≤ 27 V, -40°C ≤ TA ≤ 125°C, unless otherwise noted.
Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
Control Interface
Input Logic High Voltage(13)
Input Logic Low Voltage(13)
Input Logic Voltage Hysteresis(14)
Input Logic Pull-down Current (SCLK, IN, SI)
RST Input Voltage Range
SO, FS Tri-state Capacitance(15)
Input Logic Pull-down Resistor (RST) and WAKE
Input Capacitance(15)
WAKE Input Clamp Voltage(16)
ICL(WAKE) < 2.5 mA
VIH
0.7 x VDD
–
VIL
–
–
VIN[0:1] (HYS)
100
600
IDWN
5.0
–
VRST
4.5
5.0
CSO
–
–
RDWN
100
200
CIN
–
4.0
VCL(WAKE)
7.0
–
–
V
0.2 x
V
VDD
1200
mV
20
μA
5.5
V
20
pF
400
kΩ
12
pF
V
14
WAKE Input Forward Voltage
ICL(WAKE) = - 2.5 mA
VF(WAKE)
- 2.0
V
–
- 0.3
SO High-state Output Voltage
IOH = 1.0 mA
FS, SO Low-state Output Voltage
IOL = -1.6 mA
VSOH
VSOL
0.8 x VDD
–
–
0.2
V
–
V
0.4
SO Tri-state Leakage Current
CS > 0.7 VDD
Input Logic Pull-up Current(17)
CS, VIN[0:1] > 0.7 x VDD
ISO(LEAK)
IUP
- 5.0
5.0
μA
0
5.0
μA
–
20
FSI Input Pin External Pull-down Resistance
FSI Disabled, HS[0:1] Indeterminate
FSI Enabled, HS[0:1] OFF
FSI Enabled, HS0 ON, HS1 OFF
FSI Enabled, HS[0:1] ON
RFS
RFSdis
RFSoffoff
RFSonoff
RFSonon
kΩ
–
0
1.0
6.0
6.5
7.0
15
17
19
40
Infinite
–
Notes
13. Upper and lower logic threshold voltage range applies to SI, CS, SCLK, RST, IN[0:1], and WAKE input signals. The WAKE and RST
signals may be supplied by a derived voltage reference to VPWR.
14. No hysteresis on FSI and WAKE pins. Parameter is guaranteed by processing monitoring but is not production tested.
15. Input capacitance of SI, CS, SCLK, RST, and WAKE. This parameter is guaranteed by process monitoring but is not production tested.
16. The current must be limited by a series resistance when using voltages > 7.0 V.
17. Pull-up current is with CS OPEN. CS has an active internal pull-up to VDD.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33984
11