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MC9S08SF4 Datasheet, PDF (1/32 Pages) Freescale Semiconductor, Inc – Technical Data | |||
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Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9S08SF4
Rev. 2, 4/2009
MC9S08SF4 Series
MC9S08SF4
20-Pin TSSOP
Case 948E
16-Pin TSSOP
Case 948F
Features
⢠8-Bit S08 Central Processor Unit (CPU)
â Up to 40 MHz CPU at 2.7 V to 5.5 V across temperature
range of â40 °C to 125 °C
â HC08 instruction set with added BGND instruction
â Support for up to 32 interrupt/reset sources
⢠On-Chip Memory
â 4 KB flash read/program/erase over full operating
voltage and temperature
â 128-byte random-access memory (RAM)
â Security circuitry to prevent unauthorized access to
RAM and flash contents
⢠Power-Saving Modes
â Two low power stop modes; reduced power wait mode
â Allows clocks to remain enabled to specific peripherals
in stop3 mode
⢠Clock Source Options
â Internal Clock Source (ICS) â Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 1% deviation over 0â70 °C and voltage, 2%
deviation over â40â85 °C and voltage, or 3% deviation
over â40â125 °C and voltage; supporting bus
frequencies up to 20 MHz
⢠System Protection
â Watchdog computer operating properly (COP) reset
with option to run from dedicated 1 kHz internal clock
source or bus clock
â Low-voltage detection with reset or interrupt; selectable
trip points
â Illegal opcode detection with reset
â Illegal address detection with reset
â Flash block protection
⢠Development Support
â Single-wire background debug interface
â Breakpoint capability to allow single breakpoint setting
during in-circuit debugging (plus two more breakpoints)
â On-chip in-circuit emulator (ICE) debug module
containing two comparators and nine trigger modes
⢠Peripherals
â IPC â Prioritize interrupt sources besides inherent
CPU interrupt table; support up to 32 interrupt sources
and up to 4-level preemptive interrupt nesting
â ADC â 8-channel, 10-bit resolution; 2.5 μs conversion
time; automatic compare function; temperature sensor;
internal bandgap reference channel; operation in stop;
fully functional from 2.7 V to 5.5 V
â TPM â One 40 MHz 6-channel and one 40 MHz
1-channel timer/pulse-width modulators (TPM)
modules; selectable input capture, output compare, or
buffered edge- or center-aligned PWM on each channel
â MTIM16 â Two 16-bit modulo timers
â PWT â Two 16-bit pulse width timers (PWT);
selectable driving clock, positive/negative/period
capture
â PRACMP â Two programmable reference analog
comparators with eight optional inputs for both positive
and negative inputs; 32-level internal reference voltages
scaled by selectable reference inputs
â IIC â Inter-integrated circuit bus module capable of
operation up to 100 kbps with maximum bus loading;
multi-master operation; programmable slave address;
interrupt-driven byte-by-byte data transfer; broadcast
mode; 10-bit addressing
â KBI â 4-pin keyboard interrupt module with software
selectable polarity on edge or edge/level modes
â FDS â Shut down output pin upon fault detection; the
fault sources can be optional enabled separately; the
output pin can be configured as output 1,0 and high
impedance when a fault occurs based on module
configuration
⢠Input/Output
â 18 GPIOs including one input-only pin and one
output-only pin
â Hysteresis and configurable pullup device on all input
pins; schmitt trigger on PWT input pins; configurable
slew rate and drive strength on all output pins.
⢠Package Options
â 16-pin TSSOP
â 20-pin TSSOP
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2009. All rights reserved.
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