FR015L3EZ Datasheet, PDF (9/12 Pages) Fairchild Semiconductor – Low-Side Reverse Bias / Reverse Polarity Protector

Typical Application Waveforms (Continued)
─ V_IN, 5V/div. The input voltage between CTL and NEG
─ V_D, 5V/div. The startup diode voltage between POS and NEG
─ V_OUT, 0.5V/div. The output voltage between CTL and POS
Time: 100ns/div
Figure 17. Reverse Bias Startup Waveform, V_IN=3V, V₁=3V, C₁=5200µF, C₂=C₃=10µF, R₁=R₂=33kΩ, R₃=2Ω
─ V_IN, 1V/div. The voltage applied on the load circuit
─ i_IN, 10A/div. The input current
Time: 2µs/div
Figure 18. Startup Waveform without FR015L3EZ Device, V_IN=3V, V₁=3V, C₁=5200µF, C₂=C₃=10µF,
R₁=R₂=33kΩ, R₃=2Ω
© 2012 Fairchild Semiconductor Corporation
FR015L3EZ • Rev. A1
9
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