FAN3216_12 Datasheet, PDF (6/18 Pages) Fairchild Semiconductor – Dual-2A, High-Speed, Low-Side Gate Drivers

Electrical Characteristics
Unless otherwise noted, VDD=12V, TJ=-40°C to +125°C. Currents are defined as positive into the device and negative
out of the device.
Symbol
Parameter
Conditions
Supply
VDD
I_DD
V_ON
VOFF
Operating Range
Supply Current, Inputs Not Connected
Turn-On Voltage
Turn-Off Voltage
INA = V_DD, INB = 0V
INA = VDD, INB = 0V
Inputs
V_{IL_T}
V_{IH_T}
I_{INx_T}
I_{INx_T}
IINx_T
IINx_T
VHYS_T
INx Logic Low Threshold
INx Logic High Threshold
Non-Inverting Input Current
Non-Inverting Input Current
Inverting Input Current
Inverting Input Current
TTL Logic Hysteresis Voltage
IN = 0V
IN = V_DD
IN = 0V
IN = VDD
Output
I_SINK
OUT Current, Mid-Voltage, Sinking⁽⁸⁾
I_SOURCE OUT Current, Mid-Voltage, Sourcing⁽⁸⁾
I_{PK_SINK} OUT Current, Peak, Sinking⁽⁸⁾
IPK_SOURCE OUT Current, Peak, Sourcing⁽⁸⁾
OUTx at VDD/2, CLOAD=0.22µF,
f=1kHz
OUTx at VDD/2,
CLOAD=0.1µF, f=1kHz
C_LOAD=0.1µF, f=1kHz
CLOAD=0.1µF, f=1kHz
VOH High Level Output Voltage
VOH = VDD – VOUT, IOUT = –1mA
VOL
tRISE
t_FALL
t_D1, t_D2
Low Level Output Voltage
Output Rise Time⁽⁹⁾
Output Fall Time⁽⁹⁾
Output Propagation Delay, TTL Inputs⁽⁹⁾
IOUT = 1mA
CLOAD=1000pF
C_LOAD=1000pF
0 - 5V_IN, 1V/ns Slew Rate
Propagation Matching Between Channels
INA=INB, OUTA and OUTB at 50%
Point
I_RVS
Output Reverse Current Withstand⁽⁸⁾
Notes:
8. Not tested in production.
9. See Timing Diagrams of Figure 6 and Figure 7.
Min.
4.5
3.40
3.20
0.8
-1.5
90
-175
-1.5
0.15
4.5
Typ. Max. Unit
18.0 V
0.75 1.20 mA
3.90 4.60 V
3.70 4.30 V
1.2
V
1.6 2.0
V
1.5 µA
120 175 µA
-120 -90 µA
1.5 µA
0.4 0.8
V
2.4
A
-1.6
A
3
A
-3
A
15 35 mV
10 25 mV
12 22 ns
9
17 ns
19
34
ns
2
4
ns
500
mA
Figure 6. Non-Inverting Timing Diagram
© 2012 Fairchild Semiconductor Corporation
FAN3216 / FAN3217_F085 • Rev. 1.0.0
6
Figure 7. Inverting Timing Diagram
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