FAN3216_12 Datasheet, PDF (12/18 Pages) Fairchild Semiconductor – Dual-2A, High-Speed, Low-Side Gate Drivers

Layout and Connection Guidelines
The FAN3216 and FAN3217 gate drivers incorporate
fast-reacting input circuits, short propagation delays,
and powerful output stages capable of delivering current
peaks over 2A to facilitate voltage transition times from
under 10ns to over 150ns. The following layout and
connection guidelines are strongly recommended:
 Keep high-current output and power ground paths
separate from logic input signals and signal ground
paths. This is especially critical for TTL-level logic
thresholds at driver input pins.
 Keep the driver as close to the load as possible to
minimize the length of high-current traces. This
reduces the series inductance to improve high-
speed switching, while reducing the loop area that
can radiate EMI to the driver inputs and
surrounding circuitry.
 If the inputs to a channel are not externally
connected, the internal 100k resistors indicated
on block diagrams command a low output. In noisy
environments, it may be necessary to tie inputs of
an unused channel to VDD or GND using short
traces to prevent noise from causing spurious
output switching.
 Many high-speed power circuits can be susceptible
to noise injected from their own output or other
external sources, possibly causing output re-
triggering. These effects can be obvious if the
circuit is tested in breadboard or non-optimal circuit
layouts with long input or output leads. For best
results, make connections to all pins as short and
direct as possible.
 FAN3216 and FAN3217 are pin-compatible with
many other industry-standard drivers.
 The turn-on and turn-off current paths should be
minimized, as discussed in the following section.
Figure 30 shows the pulsed gate drive current path
when the gate driver is supplying gate charge to turn the
MOSFET on. The current is supplied from the local
bypass capacitor, C_BYP, and flows through the driver to
the MOSFET gate and to ground. To reach the high
peak currents possible, the resistance and inductance in
the path should be minimized. The localized CBYP acts
to contain the high peak current pulses within this driver-
MOSFET circuit, preventing them from disturbing the
sensitive analog circuitry in the PWM controller.
Figure 31 shows the current path when the gate driver
turns the MOSFET OFF. Ideally, the driver shunts the
current directly to the source of the MOSFET in a small
circuit loop. For fast turn-off times, the resistance and
inductance in this path should be minimized.
Figure 31. Current Path for MOSFET Turn-Off
Figure 30. Current Path for MOSFET Turn-On
© 2012 Fairchild Semiconductor Corporation
FAN3216 / FAN3217 • Rev. 1.0.0
12
www.fairchildsemi.com