9020 Datasheet, PDF (6/25 Pages) Fairchild Semiconductor – IGBT Basic II

t8 region
: In this region, the value of v_CE is maintained at v_d, while i_C decreases at a rate equivalent to
the following equations. The rate of increase can also be controlled with R_G.
d_--d--i_{--tC-- = gfs ⋅ -C---}^V_{-I--E--G-S---E-⋅--,-IR--O---G-}
Like the turn-on transient region, there is over-voltage in t7 and t8 regions, as the voltage V_LS
= L_S×di_C/dt, which is injected into the stray inductance from the effect of di_C/dt, is added to the
C-E region of the IGBT. t8, which is the first of the 2 regions where i_C decreases, is the region
where MOSFET current disappears from the IGBT’s i_C.
t9 region
: BJT current of the IGBT’s i_C disappears in this region, and this current is often called the cur-
rent tail. It is caused by the recombination of the minority carrier (hole), which is injected into
the N- drift region Due to this region, IGBT switching characteristics are inferior to that of the
power MOSFET.
4. Gate drive design basics
IGBT can be made to conduct when appropriate voltage (generally +15V) is introduced to the
gate of IGBT, and the current is cut off if v_GE is below the threshold voltage (V_GE(th), generally,
less than 0V). Under the ideal condition, the voltage should be zero between the collector and
the emitter (V_CE), and it should be zero in blocking, and its switching loss is also zero, since
IGBT is generally a device that works in a switch-mode, not as a linear amplifier. Although it is
not possible in reality, a good device should approach these conditions in operation. In order to
do so, one must select a device that satisfies the ideal conditions as much as possible, then
the optimum gate drive must be designed for the system to realize the best performance.
V_GG+(positive gate bias voltage), R_G, max I_G, drive layout, drive power rating are some of the
basic parameters necessary in designing a gate drive. It is necessary to understand each of
the parameters as well as the characteristics of IGBT switching in order to design a gate drive.
The value of V_GG+ are related to on-state loss and switching speed, while the value of R_G is
related to switching performance. In addition, if the power of a gate drive, or supply capacity of
I_G is not enough, then the values of V_GG+ and R_G become meaningless. At the same time,
attention is required in the layout of the gate drive to prevent induced turn-on due to dv/dt. The
aforementioned parameters will be discussed in following sections based on the commonly
used half bridge topology (Fig. 3).
(Devices with better performances, in general, have lower power dissipation. Minimizing
power dissipation is directly related to the cost, size, efficiency and fidelity of the overall sys-
tem. As such, other topics discussed in this chapter must be understood with device power
dissipation in mind.)
A. V_GG+
V_GG+ is the voltage across the gate and the emitter terminal during conduction, and it is one of
the most important parameter in designing the gate drive. The value of V_GG+ must be made
with considerations for trans-conductance characteristics or I-V characteristics shown in the
data sheet; diagrams of SOA (Forward Bias, Reverse Bias, Short Circuit); maximum values of
I_C and V_CE; value of t_f, and the interrelationships among these parameters must be consid-
ered.
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Rev. A, April 2002