9020 Datasheet, PDF (5/25 Pages) Fairchild Semiconductor – IGBT Basic II

a. Turn-on transient region
t0 region
: This is a region where i_G (gate current) charges parasitic input +capacitance C_ge, C_gc, and
v_GE rises to V_GE(th). Waveform of increasing v_GE is shown to be linear, but in reality it is an
exponential curve with time constant of R_G(C_ge+C_gc). In this region, there is no change in v_CE
and i_C. Delay time is defined as the time it takes for the gate voltage to go from 10% of V_GG+ to
the moment i_C becomes 10% of I_O. As such, most of turn-on delay falls in this region.
t1 region
: As v_GE passes V_GE(th), a channel is formed on p base region below the gate oxide, and cur-
rent begins to conduct. During this time, IGBT is in an active region, and i_C increases in rela-
tion to v_GE, which rises beyond V_GE(th). In this region, i_C increases in relation to the increase in
v_GE and finally reaches the full load current (I_O). In t1 and t2 region, the value of v_CE appears
shaved off compared with the value of V_d. This is because V_LS = L_S*di_C/dt, which is the volt-
age across L_S as shown in Fig. 2, while i_C current increases. The amount shaved off is related
to the size of di_C/dt and L_S, and its shape changes according to i_C pattern.
t2, t3 region
: In i_D pattern, diode current decreases beginning in the t1 region. However, it does not imme-
diately decrease to 0A, but there is a reverse recovery, as it flows in the reverse direction. This
current is added to i_C current to show the same pattern as i_C in the t2 and t3 region. At this
time, voltage across the diode recovers and increases, while v_CE falls, and it falls rapidly as
C_gc has small value when v_CE has high value. Due to this phenomenon, dv_CE/dt is rather large
at this time. In t3 region, C_gc absorbs and discharges the current from the gate drive and the
discharge current from C_ge. At the end of the t3 region, reverse recovery of the diode comes to
a close.
t4 region
: Also in this region, i_G is charging C_gc, and v_GE maintains V_GE,Io, and i_C maintains full load
current (I_O), while v_CE falls at a rate of (V_GG-V_GE,Io)/(R_GC_gc). By this time, v_CE has diminished
significantly, and there is a voltage tail, as C_gc has a large value when v_CE is low.
t5 region
: In this region, v_GE increases again until V_GG+ with R_G(C_ge+C_gc,miller) as time constant.
C_gc,miller is the C_gc that rose from low v_CE value due to the miller effect. In this region, v_CE
slowly diminishes to the collector-to-emitter on-state voltage and becomes completely satu-
rated. This is because the IGBT pnp transistor portion is slower than the MOSFET portion in
crossing the active region to reach on-state (hard saturation) as well as the effect from
C_gc,miller.
b. Turn-off transient region
t6 region
: This is the region of t_d(off) (Turn off delay time), where v_GE falls from injected V_GG+ to V_GE,Io
with a time constant of R_G (C_ge+C_gc,miller). At this time, there is no change in the values of v_CE
or i_C.
t7 region
: v_CE increases in this region, and the rate can be controlled with R_G as shown in the equation
below:
-^d---^v-_d---^C_t----^E- = _C----^V-_r--_e--^G-_s---^E-_â‹--^,-^I_R--^O--_G--
5
Rev. A, April 2002