74ABT374_07 Datasheet, PDF (6/13 Pages) Fairchild Semiconductor – Octal D-Type Flip-Flop with 3-STATE Outputs

AC Operating Requirements
Symbol
Parameter
t_S(H)
t_S(L)
t_H(H)
t_H(L)
t_W(H)
t_W(L)
Setup Time, HIGH or
LOW D_n to CP
Hold Time, HIGH or LOW
D_n to CP
Pulse Width, CP HIGH or
LOW
T_A = +25°C
V_CC = +5.0V
C_L = 50pF
Min. Max.
T_A = –55°C to +125°C T_A = –40°C to +85°C
V_CC = 4.5V to 5.5V V_CC = 4.5V to 5.5V
C_L = 50pF
C_L = 50pF
Min.
Max.
Min.
Max.
Units
1.5
2.5
1.0
ns
1.5
2.5
1.5
1.0
2.5
1.0
ns
1.0
2.5
1.0
3.0
3.3
3.0
ns
3.0
3.3
3.0
Extended AC Electrical Characteristics
SOIC package.
Symbol
Parameter
T_A = –40°C to +85°C,
V_CC = 4.5V to 5.5V,
C_L = 50pF,
8 Outputs
Switching⁽⁸⁾
Min
Max
T_A = –40°C to +85°C,
V_CC = 4.5V to 5.5V,
C_L = 250pF⁽⁹⁾
Min
Max
T_A = –40°C to +85°C,
V_CC = 4.5V to 5.5V,
C_L = 250pF,
8 Outputs
Switching⁽¹⁰⁾
Min
Max Units
t_PLH Propagation
1.5
5.7
2.0
7.8
2.0
10.0
ns
t_PHL ^{Delay CP to On}
1.5
5.7
2.0
7.8
2.0
10.0
t_PZH Output Enable
1.5
6.2
2.0
8.0
2.0
10.5
ns
t_PZL ^Time
1.5
6.2
2.0
8.0
2.0
10.5
t_PHZ Output Disable
1.0
5.5
(11)
t_PZL ^Time
1.0
5.5
(11)
ns
Notes:
8. This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
9. This specification is guaranteed but not tested. The limits represent propagation delay with 250pF load capacitors
in place of the 50pF load capacitors in the standard AC load. This specification pertains to single output switching
only.
10. This specification is guaranteed but not tested. The limits represent propagation delays for all paths described
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250pF load capacitors in place of the 50pF load
capacitors in the standard AC load.
11. The 3-STATE delay Time is dominated by the RC network (500Ω, 250pF) on the output and has been excluded from
the datasheet.
©1992 Fairchild Semiconductor Corporation
74ABT374 Rev. 1.4
6
www.fairchildsemi.com