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FXMHD103UMX Datasheet, PDF (3/16 Pages) Fairchild Semiconductor – FXMHD103 HDMI Voltage Translator
Block Diagrams (Continued)
Figure 3. Circuit Block Diagram
Table 1. Truth Table (VCCA & VCCC Valid)
OE
HPD_C
OE Internal
VREG
HPD_H SCL_C SDA_C CEC_C
LOW
HIGH
Don’t Care
LOW
LOW
LOW
Disabled
Disabled
3-State
Enabled
3-State
3-State(2)
3-State
3-State(2)
3-State
3-State(2)
HIGH
HIGH
HIGH
Enabled
Enabled
Enabled
Enabled
Enabled
Note:
2. SCL_C and SDA_C internally pulled up to VCCC. CEC_C is 0V because VREG is disabled. This is required for
HDMI compliance testing. The VOUTDIS parameter captures this requirement.
© 2012 Fairchild Semiconductor Corporation
FXMHD103 • Rev. 1.0.2
3
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