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| FAN5026_11 Datasheet, PDF (3/17 Pages) Fairchild Semiconductor – Dual DDR / Dual-Output PWM Controller | |||
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Pin Configuration
Figure 3. TSSOP-28
Pin Definitions
Pin #
1
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10
19
Name
AGND
LDRV1
LDRV2
PGND1
PGND2
SW1
SW2
HDRV1
HDRV2
BOOT1
BOOT2
ISNS1
ISNS2
EN1
EN2
Description
Analog Ground. This is the signal ground reference for the IC. All voltage levels are measured
with respect to this pin
Low-Side Drive. The low-side (lower) MOSFET driver output. Connect to gate of low-side
MOSFET.
Power Ground. The return for the low-side MOSFET driver. Connect to source of low-side
MOSFET.
Switching Node. Return for the high-side MOSFET driver and a current sense input. Connect
to source of high-side MOSFET and low-side MOSFET drain.
High-Side Drive. High-side (upper) MOSFET driver output. Connect to gate of high-side
MOSFET.
BOOT. Positive supply for the upper MOSFET driver. Connect as shown in Figure 4.
Current-Sense Input. Monitors the voltage drop across the lower MOSFET or external sense
resistor for current feedback.
Enable. Enables operation when pulled to logic HIGH. Toggling EN resets the regulator after a
latched fault condition. These are CMOS inputs whose state is indeterminate if left open.
GND Ground
VSEN1
VSEN2
Output Voltage Sense. The feedback from the outputs; used for regulation as well as PG,
under-voltage, and over-voltage protection and monitoring.
Continued on the following pageâ¦
© 2005 Fairchild Semiconductor Corporation
FAN5026 ⢠Rev. 1.0.8
3
www.fairchildsemi.com
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