FAN6520A_06 Datasheet, PDF (2/15 Pages) Fairchild Semiconductor – Single Synchronous Buck PWM Controller

Pin Configuration
BOOT
HDRV
GND
LDRV
1
8
2
7
FAN6520A
3
6
4
5
SW
COMP/OCSET/SD
FB
VCC
FAN6520AM 8-Pin SOIC Package
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
Description
BOOT
Bootstrap Supply Input. Provides a boosted voltage to the high-side MOSFET driver.
Connect to bootstrap capacitor, as shown in Figure 1.
HDRV
High-Side Gate-Drive Output. Connect to the gate of the high-side power MOSFET(s).
This pin is monitored by the adaptive shoot-through protection circuitry to determine when
the upper MOSFET has turned off.
GND
Ground. The signal and power ground for the IC. Tie this pin to the ground island/plane
through the lowest impedance connection available. Connect directly to source of low-side
MOSFET(s).
LDRV
Low-Side Gate-Drive Output. Connect to the gate of the low-side power MOSFET(s).
This pin is monitored by the adaptive shoot-through protection circuitry to determine when
the lower MOSFET has turned off.
VCC
VCC. Provides bias power to the IC and the drive voltage for LDRV. Bypass with a ceramic
capacitor as close to this pin as possible.
FB
Feedback. This pin is the inverting input of the internal error amplifier. Use this pin, in com-
bination with the COMP/OCSET pin, to compensate the voltage-control feedback loop of
the converter.
COMP/
OCSET/SD
Compensation / Over-Current Set Point / Shut Down. This is a multiplexed pin. During
operation, the output of the error amplifier drives this pin. During a short period of time fol-
lowing power-on reset (POR), this pin is used to determine the over-current threshold of the
converter. Pulling COMP/OCSET to a level below 0.8V disables the controller. Disabling the
controller causes the oscillator to stop, the HDRV and LDRV outputs to be held low, and the
soft-start circuitry to restart.
SW
Switch Node Input. The SW pin provides return for the high-side bootstrapped driver, is a
sense point for the adaptive shoot-through protection, and is used to monitor the drop
across the upper MOSFET’s R_DS(ON) for current limit. Connect as shown in Figure 1.
© 2005 Fairchild Semiconductor Corporation
FAN6520A Rev. 1.0.5
2
www.fairchildsemi.com