FAN6520A_06 Datasheet, PDF (11/15 Pages) Fairchild Semiconductor – Single Synchronous Buck PWM Controller

High-Side Losses
Figure 10 shows a MOSFET’s switching interval, with the
upper graph being the voltage and current on the drain-
to-source and the lower graph detailing V_GS vs. time with
a constant current charging the gate. The x-axis, there-
fore, is also representative of gate charge (Q_G). C_ISS =
C_GD + C_GS and it controls t1, t2, and t4 timing. C_GD
receives the current from the gate driver during t3 (as
V_DS is falling). The gate charge (Q_G) parameters on the
lower graph are either specified or can be derived from
the MOSFET’s datasheet.
Assuming switching losses are about the same for both
the rising edge and falling edge, Q1’s switching losses
occur during the shaded time when the MOSFET has
voltage across it and current through it.
These losses are given by:
P_UPPER = P_SW + P_COND
(24)
PSW
=
⎛
⎝
-V----D----S------^×-----I--L-
2
×
2
×
ts_⎠⎞
FSW
(25)
PCOND
=
⎛
⎜
⎝
V----V-O---I--UN----T---_{⎠⎟⎞}
×
IOU
2
T
×
RDS_(ON
)
(26)
where P_UPPER is the upper MOSFET’s total losses, P_SW
and P_COND are the switching and conduction losses for a
given MOSFET, R_DS(ON) is at the maximum junction tem-
perature (T_J), and t_S is the switching period (rise or fall
time) and is t2+t3 (Figure 10).
The driver’s impedance and C_ISS determine t2, while t3’s
period is controlled by the driver’s impedance and Q_GD.
Since most of t_S occurs when V_GS = V_SP, use a constant
current assumption for the driver to simplify the calcula-
tion of t_S:
ts
≈
-Q-----G-----⁽---S----W------⁾-
IDRIVER
≈
--------------------Q-----G-----⁽--S----W------⁾--------------------
⎛
⎜
⎝
-R----D-----R----VI--V---^C--E-^C---R--^–----+-V----SR----P-G-----A----T----E-- _{⎠⎟⎞}
(27)
V_DS
C _ISS
C _GD
C _ISS
I_D
V_SP
V_TH
V_GS
Q_GS
Q_GD
Q_G(SW)
t1
t2
t3
4.5V
t4
t5
Figure 10. Switching Losses and Q_G
5V
R_D
V_IN
HDRV
SW
C_GD
R_GATE
G
C_GS
Figure 11. Drive Equivalent Circuit
Most MOSFET vendors specify Q_GD and Q_GS. Q_G(SW)
can be determined as Q_G(SW) = Q_GD + Q_GS – Q_TH where
Q_TH is the gate charge required to reach the MOSFET
threshold (V_TH). For the high-side MOSFET, V_DS = V_IN,
which can be as high as 20V in a typical portable appli-
cation. Care should be taken to include the delivery of
the MOSFET’s gate power (P_GATE) in calculating the
power dissipation required:
P_GATE = Q_G × V_CC × F_SW
(28)
where Q_G is the total gate charge to reach V_CC.
©2005 Fairchild Semiconductor Corporation
FAN6520A Rev. 1.0.5
11
www.fairchildsemi.com