FIN3385_12 Datasheet, PDF (14/21 Pages) Fairchild Semiconductor – Low-Voltage, 28-Bit, Flat-Panel Display Link Serializer / Deserializer

AC Loadings and Waveforms
Figure 7. Worst-Case Test Pattern
Note:
20. The worst-case test pattern produces a maximum toggling of digital circuits, LVDS I/O, and LVTTL/CMOS I/O.
Depending on the valid strobe edge of the transmitter, the TxCLKIn can be rising or falling edge data strobe.
Figure 8. Transmitter LVDS Output Load and Transition Times
Figure 9. Transmitter Setup/Hold and HIGH/LOW Times (Rising-Edge Strobe)
Figure 10. Transmitter Input Clock Transition Time
Figure 11. Transmitter Outputs Channel-to-Channel Skew
© 2003 Fairchild Semiconductor Corporation
FIN3385 / FIN3386 • Rev. 1.0.6
14
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