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FAN21SV06_12 Datasheet, PDF (14/17 Pages) Fairchild Semiconductor – TinyBuck™ 6 A, 24V Single-Input Integrated Synchronous Buck Regulator with Synchronization Capability
Calculating the Inductor Value
Typically the inductor value is chosen based on ripple
current (ΔIL) which is chosen between 10 to 35% of the
maximum DC load. Regulator designs that require fast
transient response use a higher ripple-current setting
while regulator designs that require higher efficiency
keep ripple current on the low side and operate at a
lower switching frequency.
ΔI L
=
VOUT • (1- D)
L•f
(4)
where f is the oscillator frequency, and
L
=
VOUT • (1- D)
ΔIL • f
(5)
Setting the Ramp-Resistor Value
As a starting point, set the internal ramp amplitude
(∆VRAMP) to 0.5 V. RRAMP is approximately:
RRAMP (KΩ )
=
(VIN − 1.8) •VOUT
18x10−6 •VIN • f
−2
(6)
where frequency (f) is expressed in KHz.
Refer to AN-6033 — FAN21SV06 Design Guide to
determine the optimal RRAMP value.
Setting the Current Limit
The current limit system involves two comparators. The
MAX ILIMIT comparator is used with a VILIM fixed-voltage
reference and represents the maximum current limit
allowable. This reference voltage is temperature
compensated to reflect the RDSON variation of the low-
side MOSFET. The ADJUST ILIMIT comparator is used
where the current limit needs to be set lower than the
VILIM fixed reference. The 10 µA current source does not
track the RDSON changes over temperature, so change is
added into the equations for calculating the ADJUST
ILIMIT comparator reference voltage, as is shown below.
Figure 32 shows a simplified schematic of the over-
current system.
RAMP
VERR
PWM
+ COMP
_
PWM
Since the ILIM voltage is set by a 10 µA current source
into the RILIM resistor, the basic equation for setting the
reference voltage is:
VRILIM = 10µA*RILIM
(7)
To calculate RILIM:
RILIM = VRILIM/ 10µA
(8)
The voltage VRILIM is made up of two components, VBOT
(which relates to the current through the low-side
MOSFET) and VRMPEAK (which relates to the peak
current through the inductor). Combining those two
voltage terms results in:
RILIM = (VBOT + VRMPEAK)/ 10µA
(9)
RILIM = {0.96 + (ILOAD * RDSON *KT*8)} +
(10)
{D*(VIN – 1.8)/(fSW*0.03*RRAMP)}/10µA
where:
VBOT = 0.96 + (ILOAD * RDSON *KT*8);
VRMPEAK = D*(VIN – 1.8)/(fSW*0.03*RRAMP);
ILOAD = the desired maximum load current;
RDSON = the nominal RDSON of the low-side MOSFET;
KT = the normalized temperature coefficient for the
low-side MOSFET (on datasheet graph);
D = VOUT/VIN duty cycle;
fSW = Clock frequency in kHz; and
RRAMP = chosen ramp resistor value in kΩ.
After 16 consecutive, pulse-by-pulse, current-limit
cycles, the fault latch is set and the regulator shuts
down. Cycling VCC or EN restores operation after a
normal soft-start cycle (refer to the Auto-Restart
section).
The over-current protection fault latch is active during
the soft-start cycle. Use 1% resistor for RILIM.
Loop Compensation
The control loop is compensated using a feedback
network around the error amplifier. Figure 33 shows a
complete Type-3 compensation network. Type-2
compensation eliminates R3 and C3.
VCC
10µA
ILIM
RILIM
VILIM
MAX
+ ILIMIT
_
ADJUST
+ ILIMIT
_
ILIMTRIP
Figure 32. Current-Limit System Schematic
Figure 33. Compensation Network
© 2006 Fairchild Semiconductor Corporation
FAN21SV06 Rev. 1.0.3
14
www.fairchildsemi.com