FAN2564_11 Datasheet, PDF (11/13 Pages) Fairchild Semiconductor – 300mA Low VIN LDO for Digital Applications

Physical Dimensions
0.03 C
2X
E
A
F
B
PIN A1 AREA
TOP VIEW
D
0.03 C
2X
0.05 C
0.06 C
0.625
0.539
0.50
(Ø0.250)
Cu Pad
0.50
(Ø0.350)
Solder Mask
RECOMMENDED LAND PATTERN
(NSMD PAD TYPE)
0.332±0.018
0.250±0.025
C
D
SEATING PLANE
SIDE VIEWS
0.50
0.50
12
0.005 C A B
Ø0.315±0.025
4X
B _(Y)±0.018
A
F
(X)±0.018
BOTTOM VIEW
NOTES:
A. NO JEDEC REGISTRATION APPLIES.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. DATUM C IS DEFINED BY THE SPHERICAL
CROWNS OF THE BALLS.
E. PACKAGE NOMINAL HEIGHT IS 582 MICRONS
±43 MICRONS (539-625 MICRONS).
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
G. DRAWING FILENAME: MKT-UC004ABrev2.
Figure 26. 4-Bump, Wafer-Level Chip-Scale Package (WLCSP), 0.5mm Pitch
Product Specific Dimensions
Product
FAN2564UCX
D
1.41 +/-0.030
E
0.93 +/-0.030
X
0.215
Y
0.455
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without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, spe-
cifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2007 Fairchild Semiconductor Corporation
FAN2564 • Rev. 1.0.2
11
www.fairchildsemi.com