ES29LV320D Datasheet, PDF (53/59 Pages) Excel Semiconductor Inc. – 32Mbit(4M x 8/2M x 16) CMOS 3.0 Volt-only, Boot Sector Flash Memory

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PHYSICAL DIMENSIONS
48-Pin Standard TSOP (measured in millimeters)
1
-A-
2
SEE DETAIL B
N
-B-
E⁵
N_-2---
N_{-2--- + 1}
D1 5
D
4
B
A
B
SEE DETAIL A
PARALLEL TO
SEATING PLANE
R
c
GAUGE
PLANE
θ°
L
0.25MM
(0.0098”) BSC
0.10 C
A2
e₉
A1
-C-
SEATING
PLANE
0.08MM (0.0031”) M C A-B S
67
b
WITH
PLATING
7 (c)
c1
BASE
b1
METAL
SECTION B-B
e/2
DETAIL A
Package
JEDEC
Symbol
A
A1
A2
b1
b
c1
c
D
D1
E
e
L
θ
R
N
MIN
-
0.05
0.95
0.17
0.17
0.10
0.10
19.80
18.30
11.90
0.50
0°
0.08
TS 48
MO-142 (B) DD
NOM
-
-
1.00
0.20
0.22
-
-
20.00
18.40
12.00
0.50 BASIC
0.60
3°
-
48
MAX
1.20
0.15
1.05
0.23
0.27
0.16
0.21
20.20
18.50
12.10
0.70
5°
0.20
NOTES:
DETAIL B
-X-
X = A OR B
1. Controlling dimensions are in millimeters(mm). (Dimensioning
and tolerancing conforms to ANSI Y14.5M-1982)
2. Pin 1 identifier for standard pin out (Die up).
3. Pin 1 identifier for reverse pin out (Die down): Ink or Laser mark
4. To be determined at the seating plane. The seating plane is def-
ined as the plane of contact that is made when the package lea-
ds are allowed to rest freely on a flat horizontal surface.
5. Dimension D1 and E do not include mold protrusion. Allowable
mold protrusion is 0.15mm (0.0059”) per side.
6. Dimension b does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.0031”) total in excess
of b dimension at max. material condition. Minimum space
between protrusion and an adjacent lead to be 0.07mm
(0.0028”).
7. These dimensions apply to the flat section of the lead between
0.10mm (0.0039”) and 0.25mm (0.0098”) from the lead tip.
8. Lead coplanarity shall be within 0.10mm (0.004”) as measured
from the seating plane.
9. Dimension “e” is measured at the centerline of the leads.
ES29LV320D
53
Rev. 2D Jan 5, 2006